Suyash Shrivastava, P. Bahubalindruni, Nishtha Kansal
{"title":"Low-Voltage Clocked Comparator With Flexible Oxide TFT Technology *","authors":"Suyash Shrivastava, P. Bahubalindruni, Nishtha Kansal","doi":"10.1109/ISCAS46773.2023.10181745","DOIUrl":null,"url":null,"abstract":"This paper presents a novel clocked comparator circuit using amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor technology. The circuit is fabricated on a 30 $\\mu \\mathrm{m}$ flexible polymide substrate. Experimental characterization took place under normal ambient conditions. The comparator circuit employs inverters using pseudo CMOS topology to obtain better swing. It employs a clocked architecture, where the pre-amplification and regeneration phases are controlled by this clock. From measurements, the circuit is showing a VinCM of 1V - 2.5 V, power consumption of 80 $\\mu \\mathrm{W}$ average input static offset of 119mV and a swing of 70% at a clock frequency of 5 MHz and an input signal frequency of 5 kHz with a supply voltage $(\\mathrm{V}_{\\text{DD}})$ of 4 V. This circuit is showing a 62.5% improvement in speed compared to the state-of-the-art work at a relatively low $\\mathrm{V}_{\\text{DD}}$ using single-gate a-IGZO TFT technology. This circuit finds potential applications in smart sensing systems on flexible substrates.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS46773.2023.10181745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a novel clocked comparator circuit using amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor technology. The circuit is fabricated on a 30 $\mu \mathrm{m}$ flexible polymide substrate. Experimental characterization took place under normal ambient conditions. The comparator circuit employs inverters using pseudo CMOS topology to obtain better swing. It employs a clocked architecture, where the pre-amplification and regeneration phases are controlled by this clock. From measurements, the circuit is showing a VinCM of 1V - 2.5 V, power consumption of 80 $\mu \mathrm{W}$ average input static offset of 119mV and a swing of 70% at a clock frequency of 5 MHz and an input signal frequency of 5 kHz with a supply voltage $(\mathrm{V}_{\text{DD}})$ of 4 V. This circuit is showing a 62.5% improvement in speed compared to the state-of-the-art work at a relatively low $\mathrm{V}_{\text{DD}}$ using single-gate a-IGZO TFT technology. This circuit finds potential applications in smart sensing systems on flexible substrates.