Proceedings of Japan International Electronic Manufacturing Technology Symposium最新文献

{"title":"A Mixed Solder Grid Array And Peripheral Leaded Mcm Package","authors":"H. Hashemi, M. Olla, D. Cobb, M. McShane, G. Hawkins, P. Lin","doi":"10.1109/IEMT.1993.639736","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639736","url":null,"abstract":"We have developed a unique low cost Multichip Module (MCM) piickage to house a 40MHz Digital Signal Processor Static RAM chipset. A collaborative design and prototype effort was undertaken between hlCC and Motorola to design, procure, assemble, and test these modules. Our design constraint w'as to merge a state-of-the-art high density interconnect subsitrate with conventional chip assembly techniques while meeting a pre-specified cost goal. The package concept is that of an MCM-L substrate with more than one chip, where the chips are connected to the substrate by means of conventional gold wire bonding and the part is overmolded. A mix of solder balls and peripheral leads are used to interface to the package. The mix of package connectorization alpproaches is used to increase the routing resources, decouple the signal and power / ground distribution, and provide good thermal coupling between the package and the next level board. Issues such as board layout, component design and fabricaition, board assembly, and first order cost models are discussad. Traditionally (only one die is placed in a package for surface or through-hole mounting. Few chip packaging involves the placement of more than one die into an enclosed package which can be handled and mounted using traditional printed circuit bOiUd assembly technologies. A few chip package, in this context, is defined as a Multichip Module (MCM) that conforms to an existing standard single chip package footprint and form factor and contains more than one chip. As the VO of chips going into conventional Quad Flat Packages (QFPs) and Pin Grid Arrays @GAS) have increased, the package size has grown extensively. In a commercial 160 lead QFP, the ratio of the silicon area to the package area is 10 mm square/28 mm square, or S1396. Besides reducing system size and cost, few chip packages allow improvements in electrical performance by grouping performance sensitive portions of a syswm into MCMs while not penalizing system assembly. Few chip packages also offer the potential for improved testability over solutions which do not include single chip packagles (i.e. MCMs) 111. There are a number of approaches which have been used to form few chip packages [2-91. In some cases small printed circuit boards containing multiple chips have been attached to the die attach pad of a leadframe for packaging into a single chip package [4]. Similarly, silicon-on-silicon modules conraining multiple chips have been placed inside plastic chip carriers [5 ] , and intoceramic PGA's [61. Companies such as Ibiden. ISI, Accurel, Hestia, TI, ATBrT, and Motorola have been working on various approaches to few chip packages for a number of years. The substrates used to interconnect the components vary from a thin film MCM in the case of AT&T Polyhic package [61 to fine line PCB's [8,91. Our approach was to explore the lower cost more simplified process that simultaneously allowed use of multiple viable vendors for key process compone","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130037339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Thermal Stress Analysis Of Conductive Adhesive Joints","authors":"A. Ogunjimi, D. Whalley, David J. Williams","doi":"10.1109/IEMT.1993.639801","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639801","url":null,"abstract":"The effect of die geometry and the bond layer\u0000thickness on the stress distribution in a conductive\u0000die attach assembly was analysed using finite element\u0000models. Models used for the analysis were those of a\u0000freely deforming assembly i.e. not restrained by\u0000packaging. It was found that the thinner the bondline,\u0000the greater the stress in the joint. The level of stress in\u0000the joint remains approximately constant for die sizes\u0000greater than (4x4)\" and a sawn through die was\u0000found to be much better for stress management.","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133187688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hermetic Sealing Method For High-speed Mcms","authors":"T. Handa, S. Iida, J. Utsunomiya, M. Sawano","doi":"10.1109/IEMT.1993.639737","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639737","url":null,"abstract":"Evaluation of microcrack formationand hermetic sealing characteristics was carried out on a brazed low-temperature cofired ceramic (LTCC) substrate and windowframe to establish a hermetic sealing technology which utilizes the LTCC substrate for high-speed multichip modules (MCMs). A windowframe, braze alloy and a thick film conductor were selected aD sealing materials and the brazing process and design guidelines evaluated. Consequently, the formation of microcracks was clarified, which enables their elimination. High reliable hermetic characteristics were achieved by means of hermetic sealing on the LTCC substrate ueing the improved sealing material, brazing procese and design guidelines.","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"122 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129486893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Polymer Ablation With A High Power Excimer Laser Tool In Manufacturing","authors":"G. Wolbold, C. L. Tessle, D. J. Tudryn","doi":"10.1109/IEMT.1993.639286","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639286","url":null,"abstract":"1. ABSTRACT This DaPeS is a descriDtion of the 3. THE STEP AND REPEAT SYSTEM ablation of polyimide bith an excimer laser ablation tool in a manufacturing line. The light source is a 150 watt, XeCl ( 308 nm ) gas laser. The projection ablation unit is very similar to that of a photo expose tool. The laser, beam delivery system, projection optics, beam homogenization, system accuracy, process, process control and system reliability will be discussed.","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114771928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Low Cost Multi-chip Module Using Fine Line Thick Film And Solder Ball Bump Interconnection Methods","authors":"M. Segawa, Y. Saito, T. Ogashiwa, H. Akimoto","doi":"10.1109/IEMT.1993.639810","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639810","url":null,"abstract":"A LOW COST MULTI-CHIP MODULE USING FINE LINE THICK FILM AND SOLDER n . a L n w INTERCONNECTION METHODS Masao SEGAW'A* Yasuhito SAITO** Toshinori Ogashiwa*** Hideyuki Akimoto*** *Video & Electronics Media Engineering Lab., TOSHIBA Corp 8 Shinsugita Isogo-ku, Yokohama 2 3 5 , Japan Tanaka Denshi Kogyo Ltd. 8-5-1 Shimorenjaku Mitaka, Tokyo 181, Japan **TOSHIBA AVE C o . Ltd. +*+ A new flip-chip bonding technique for realizing low cost multi-chip module by a simple production process has been developed. Solder ball bumps can be directly bonded to aluminum pads on an I C by using a unique tin based alloy wire utilizing a modified wire bonding method. The bumped IC can be directly connected to a fine line thick film electrode by a simple heat-press bonding process without any auxiliary materials. The bonding conditions were controlled to enable stable bonding. Successful results were a l s o obtained from reliability tests and prototype making.","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131106068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Interactions Between Thick Film Resistors And Alumina Substrate","authors":"H. Moriwaki, A. Suzuki, Y. Watanabe, M. Ishiwata, T. Kamata, K. Adachi","doi":"10.1109/IEMT.1993.639342","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639342","url":null,"abstract":"Interactions upon firing of Ru-based thick film resistor(TFR) pastes with alumina substrate have been investigated intensively using various m icroana I yt i ca I means. vitreous contents of TFRs and alumina, formations of Ru-free glass layer and occasional crystalline phase have been disclosed in the bot tom layer of TFRs. The crystalline phase has been identified to be the variation within the plagioclase (Ca,Pb)Si2Als0, family. Growth rate o f the glass layer is shown to be controlled by a diffusional process, and the effects of the reactions on various TFR properties are signified. In addition to the mutual diffusion between","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125930006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Micro Step Structures Motion Of Polysilicon On Silicon Substrate","authors":"Junqi Zhu, T. Akiyama, K. Shono","doi":"10.1109/IEMT.1993.639359","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639359","url":null,"abstract":"","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123043868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Ceramic Flat Packages For High-speed And High-frequency","authors":"K. Nacata, T. Miyamoto, F. Miyagawa","doi":"10.1109/IEMT.1993.639383","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639383","url":null,"abstract":"The ceramic flat packages for high- speed and higln-frequency devices have been devel- oped. Signal lines of these packages need to be distributed clonstant circuit designs, and instal- lation of transmission lines will be required. When the packages are.designed, there are impor- tant that t he careful consideration of difference in quality amlong various transmission lines, and the estimate of resonance frequencies. We fabri- cated the prototypes of ceramic flat packages, using partial ground and pseudo rectangular coax- ial line, and reinforcing the ground by replacing the HSL uith the CCPW. The application frequency bandwidth of 48-leads package is obtained 20GHz, but did not r each as high as the cut-off frequency of pseudo rectangular c oaxial s ection. 1. Introducti~ As the advancement of devices in high-speed and high-frequency, high frequency characteristics of packages indispensable for these mounting are becoming all the more important ('I 01 . Packages are accordingly required to play the role of \"intermediator\" between the devices and printed circuit boards m aintaining high-speed, high-frequency performance. So signal lines of packages need to be distributed constant circuit and to incorporate the transmission line designs. For their pr21ctical application, the improvement is desirable to be d one only for t he internal structure without any effect on the external di- mensions of conventional packages. This paper describes structures of the trans- mission lines formed in packages, the quality of the transmission lines, and resonance in packages. Then we fabricated prototypes of ceramic flat packages with 50mils outer lead pitch, and report their transmi.ssion characteristics.","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133719755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Applications And Technology For Laminate Multicihip Modules","authors":"R. Crowley, E. J. Vardaman","doi":"10.1109/IEMT.1993.639738","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639738","url":null,"abstract":"Multichip modules (MCMs) are under investigation by companies in almost every area of the electronics industry. MCMs are being used today for large computer and military applications. MCM prototypes have been developed for portable computers, portable communications devices, telecommunications systems, workstations, and automotive electronics. This paper examines the applications for laminate MCM technology, the growth in laminate, material selection, new process methods, and some of the impacts on cost. There are many substrate options, such as ceramic, glass ceramic, thin film on ceramic, thin film on silicon, and laminate. Laminate materials include polymers from FR-4 (glass epoxy) to polyimide, and offer a material option that is familiar to most users. New technologies such as laser via formation are under development, and will allow the fabrication of denser substrates. New or improved testing techniques are needed. Depending on the application, careful attention must be given to the type of material selected for electrical and thermal reasons. The type of laminate material selected, as well as the choice of processing and testing methods have an impact on the cost. 1. What are Laminate MCMs? There is no difference between a laminate substrate for a multichip module (MCM) and a conventional printed circuit board, with the exception of finer patterns and via diameters in the substrates used for MCMs. The Institute for Interconnecting and Packaging Electronic Circuits (IPC) defines laminate multichip modules (MCM-L) as substrates based on laminated, multilayer printed wiring board technobgy. Standard printed circuit boards are not considered MCMs unless bare chips are mounted on","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"2522 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131377849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Whisker Reinforced Copper / Glass-ceramic Multilayer Substrate","authors":"K. Ikuina, M. Kimura, K. Utsumi","doi":"10.1109/IEMT.1993.639758","DOIUrl":"https://doi.org/10.1109/IEMT.1993.639758","url":null,"abstract":"A new Copper/Glass-Ceramic mu1 t i layer substrate has developed. This substrate has advantages of very low dielectric constant (4.0) and, at the same times high mechanical strength (200MPa). Furthermore, this substrate can be wired with highly conduct ive copper ( 1 . 9 , ~ -cm) , so that it can be applied to many systems. This paper discusses three new technologies used, to realize this substrate. They are designing a new GC composite material system, highly conductive copper paste and its manufacturing process. Also, basic pulse transmission properties and high frequency circuit loss for the new substrate are discussed.","PeriodicalId":170695,"journal":{"name":"Proceedings of Japan International Electronic Manufacturing Technology Symposium","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123798185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}