Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's最新文献_第3页

The advantages of boundary-scan testing 边界扫描测试的优点

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208136

S. L. Dingle, Luke D. Lacroix, Peter A. Twombly

引用次数: 2

Linear microcircuit fault modeling and detection 线性微电路故障建模与检测

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208133

B. R. Epstein, Steven R. Miller, M. Czigler, David R. Gray

引用次数: 5

Aspects on integration of high-speed multiplexers and demultiplexers in VLSI test systems VLSI测试系统中高速复用器与解复用器集成的若干问题

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208142

M. Chowanetz, C. Kuntzsch, W. Wolz

引用次数: 0

Probabilistic measures of fault equivalence in mixed-signal systems 混合信号系统故障等价的概率测度

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208135

M. Soma

{"title":"Probabilistic measures of fault equivalence in mixed-signal systems","authors":"M. Soma","doi":"10.1109/VTEST.1991.208135","DOIUrl":"https://doi.org/10.1109/VTEST.1991.208135","url":null,"abstract":"A study of fault equivalence in mixed analogue-digital circuits and systems is presented, emphasizing both the theoretical analysis of the equivalence concept as well as experimental results from three classes of circuits: sample-and-hold, digital-to-analog converter, and analog-to-digital converter. While fault equivalence is well understood in digital fault models, the concept is still quite new for analog fault models. The concept is also valid within the context of mixed-signal fault models, but the equivalence has to be defined in the frequency domain and in some cases, has to be approached from a probabilistic perspective. The experimental results include fault effects due to the classic digital stuck-at-fault models as well as analog faults such as out-of-specification performance, nonlinearity, etc. For each class of circuit, extensive simulation is conducted to study the fault behavior and experimental measurements are carried out to verify these behaviors as well as to confirm the validity of equivalence definition. The major application of this study is in test generation and fault diagnosis, similar to the application of digital equivalent faults in defining test vectors for equivalence classes.<<ETX>>","PeriodicalId":157539,"journal":{"name":"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's","volume":"375 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131611710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Interconnect verification of multichip modules using boundary scan 使用边界扫描的多芯片模块互连验证

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208138

David S. Karpenske

引用次数: 3

On polynomial-time testable classes of combinational circuits 组合电路的多项式时间可测试类

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208154

N. Rao, S. Toida

引用次数: 2

High accelerated lifetime test methods and procedures for VLSI microcircuit interconnection line certification VLSI微电路互连线认证的高加速寿命测试方法和程序

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208144

E. Weis, E. Kinsbron, G. Chanoch, M. Snyder

引用次数: 1

An adaptive device impedance matching circuit 一种自适应器件阻抗匹配电路

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208146

M. C. Kohalmy

引用次数: 0

Distributed self-diagnosis of VLSI mesh array processors VLSI网格阵列处理器的分布式自诊断

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208155

M. Cutler, S. Su, Mingshien Wang

引用次数: 1

A statistical model for fault coverage analysis 故障覆盖分析的统计模型

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI: 10.1109/VTEST.1991.208163

C. Chen, N. Soong

引用次数: 1