使用边界扫描的多芯片模块互连验证

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI:10.1109/VTEST.1991.208138

David S. Karpenske

{"title":"使用边界扫描的多芯片模块互连验证","authors":"David S. Karpenske","doi":"10.1109/VTEST.1991.208138","DOIUrl":null,"url":null,"abstract":"Certainly one of the key factors in the manufacture of multichip modules (MCM) is the verification and fault diagnosis of an MCM's structural interconnects. High performance MCM products, which are clearly an expensive technology, will incur additional costs unless appropriate diagnostic tools are made available for fast failure analysis during production test. Boundary scan implementation is key in making these tools feasible.<<ETX>>","PeriodicalId":157539,"journal":{"name":"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Interconnect verification of multichip modules using boundary scan\",\"authors\":\"David S. Karpenske\",\"doi\":\"10.1109/VTEST.1991.208138\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Certainly one of the key factors in the manufacture of multichip modules (MCM) is the verification and fault diagnosis of an MCM's structural interconnects. High performance MCM products, which are clearly an expensive technology, will incur additional costs unless appropriate diagnostic tools are made available for fast failure analysis during production test. Boundary scan implementation is key in making these tools feasible.<<ETX>>\",\"PeriodicalId\":157539,\"journal\":{\"name\":\"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-04-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTEST.1991.208138\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1991.208138","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

当然，多芯片模块(MCM)结构互连的验证和故障诊断是制造MCM的关键因素之一。高性能MCM产品显然是一项昂贵的技术，除非在生产测试期间提供适当的诊断工具进行快速故障分析，否则将产生额外的成本。边界扫描的实现是使这些工具可行的关键。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Interconnect verification of multichip modules using boundary scan

Certainly one of the key factors in the manufacture of multichip modules (MCM) is the verification and fault diagnosis of an MCM's structural interconnects. High performance MCM products, which are clearly an expensive technology, will incur additional costs unless appropriate diagnostic tools are made available for fast failure analysis during production test. Boundary scan implementation is key in making these tools feasible.<>

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's

自引率

0.00%

发文量