The advantages of boundary-scan testing

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI:10.1109/VTEST.1991.208136

S. L. Dingle, Luke D. Lacroix, Peter A. Twombly

引用次数: 2

Abstract

Boundary scan has been used extensively by IBM in custom logic, standard cell, and gate array logic chips. Actual implementations of boundary-scan methods used in testing these chips are discussed. The benefits of this approach are reviewed, and an economic analysis of the cost savings attributable to boundary scan are presented.<>

查看原文本刊更多论文

边界扫描测试的优点

边界扫描已被IBM广泛应用于自定义逻辑、标准单元和门阵列逻辑芯片。讨论了用于测试这些芯片的边界扫描方法的实际实现。回顾了这种方法的好处，并对边界扫描节省的成本进行了经济分析。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's

自引率

0.00%

发文量