Y. Mita, J. Pourciel, M. Kubota, Shaojun Ma, S. Morishita, A. Tixier-Mita, T. Masuzawa
{"title":"A Balanced-SeeSaw MEMS swing probe for vertical profilometry of deep micro structures","authors":"Y. Mita, J. Pourciel, M. Kubota, Shaojun Ma, S. Morishita, A. Tixier-Mita, T. Masuzawa","doi":"10.1109/ICMTS.2010.5466858","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466858","url":null,"abstract":"An actuator-integrated MEMS needle probe is improved to measure vertical surface profile of narrow and deep test structures such as microholes and trenches. A newly developed surface scanning method, called ¿swing probing¿, can reduce the measurable feature size by factor of up to eight (i.e. from 40 ¿m down to 5 ¿m for 50¿m-deep trenches, and down to 25 ¿m for 1 mm-deep ones) as compared to traditional ¿slide probing¿. The improvement is due to the new ¿Balanced-SeeSaw¿ probe design that guarantees rotational movement without wobbling as well as sensitivity increase. Since the design is highly scalable, the probe can further reduce target feature size as well as measurement resolution thus may enlarge the application field of such surface quality assessment technology to MEMS process test structure monitoring.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125243235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Li, Y. Fu, B. Flynn, W. Parkes, Y. Liu, S. Brodie, J. Terry, L. Haworth, A. Bunting, J. Stevenson, S. Smith, A. Walton
{"title":"Test structures for characterising the integration of EWOD and SAW technologies for microfluidics","authors":"Y. Li, Y. Fu, B. Flynn, W. Parkes, Y. Liu, S. Brodie, J. Terry, L. Haworth, A. Bunting, J. Stevenson, S. Smith, A. Walton","doi":"10.1109/ICMTS.2010.5466861","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466861","url":null,"abstract":"This paper presents details of the design and fabrication of test structures specifically designed for the characterisation of two distinct digital microfluidic technologies: Electro-Wetting On Dielectric (EWOD) and Surface Acoustic Wave (SAW). A test chip has been fabricated that includes structures with a wide range of dimensions and provides the capability to characterise enhanced droplet manipulation as well as other integrated functions. In particular, we detail the use of EWOD to anchor droplets while SAW excitation is applied to perform mixing.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116002566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yasuhiro Miyake, M. Goto, S. Fujii, Hidetoshi Nishimura
{"title":"Correlation between Direct Charge Measurement (DCM) and LCR meter on deep submicron CMOS test structure capacitance measurement","authors":"Yasuhiro Miyake, M. Goto, S. Fujii, Hidetoshi Nishimura","doi":"10.1109/ICMTS.2010.5466830","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466830","url":null,"abstract":"This paper reports capacitance measurement correlation between Direct Charge Measurement (DCM) and conventional LCR meter on 0.18um CMOS test structure. Measurement results of interconnect and MOSCAP test structures are presented. Mathematical analysis shows that DCM and LCR meter results correlate very well for MOSCAP as well. Amplitude Adjustment Method and Amplitude Extrapolation Methods are proposed to calibrate nonlinear C-V measurement errors. Theoretical discussion can also be applied to Charge-Based Capacitance Measurement (CBCM) because it uses similar stimulus.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122574076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A test structure for integrated capacitor array matching characterization","authors":"W. Posch, G. Promitzer, E. Seebacher","doi":"10.1109/ICMTS.2010.5466833","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466833","url":null,"abstract":"A novel characterization setup for integrated capacitor array mismatch determination is presented. The biasing of twenty capacitor units and the selection of a specific array are controlled by externally generated digital signals. Information about the spatial matching behavior is provided for an entire MIM capacitor array, where the relevant parameters are the standard deviations σ(δCi / C) and the offsets μ(δCi / C) of units i. Furthermore, the measurement repeatability is determined and an advanced derivation to consider the correlations introduced by the circuit structure and the extraction method is presented. The corresponding test chips were successfully realized in 0.35 um and 0.18 um standard CMOS technologies.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121579468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Terada, Naoya Ekida, K. Tsuji, T. Tsunomura, A. Nishida
{"title":"MOSFET-array for extracting parameters expressing SPICE-parameter variation","authors":"K. Terada, Naoya Ekida, K. Tsuji, T. Tsunomura, A. Nishida","doi":"10.1109/ICMTS.2010.5466855","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466855","url":null,"abstract":"Parameters in Pelgrom's model, which express SPICE-model parameter variations, are evaluated using MOSFET array which has 16K DUTs and is made using 65-nm technology. It is found that the parameters expressing the random component of the variation are dominant, and that the parameters expressing the systematic component are mainly determined by the gate-insulator thickness.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131647953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigation on the field leakage current in 0.35μm CMOS technology at high temperature","authors":"S. T. Kong, P. Ronald, Chris Lee","doi":"10.1109/ICMTS.2010.5466849","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466849","url":null,"abstract":"For the first time, this paper demonstrates the experimental results for two types of test structures of field transistors up to 200°C. The field transistor structures which are stripe (conventional) and square ring (new) structures were measured and investigated in term of field leakage current and on-state characterization at high temperature.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133119137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Smith, N. Brockie, J. Murray, C. Wilson, A. Horsfall, J. Terry, J. Stevenson, A. Mount, A. Walton
{"title":"Analysis of the performance of a micromechanical test structure to measure stress in thick electroplated metal films","authors":"S. Smith, N. Brockie, J. Murray, C. Wilson, A. Horsfall, J. Terry, J. Stevenson, A. Mount, A. Walton","doi":"10.1109/ICMTS.2010.5466852","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466852","url":null,"abstract":"Previously reported suspended microrotating test structures designed to measure the stress in thick layers of electroplated Permalloy (NiFe alloy) have been analysed using finite element modelling and compared with experimental measurements. These results have been used to optimise a stress sensor test structure and design a new mask, with an array of test structures specifically designed to wafer map the stress of thick nickel and Permalloy films. This is the first time these structures have been employed for determining spatial variation in film stress and the results of this characterisation are reported for nickel.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128462415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Pfost, D. Costachescu, A. Podgaynaya, M. Stecher, S. Bychikhin, D. Pogany, E. Gornik
{"title":"Small embedded sensors for accurate temperature measurements in DMOS power transistors","authors":"M. Pfost, D. Costachescu, A. Podgaynaya, M. Stecher, S. Bychikhin, D. Pogany, E. Gornik","doi":"10.1109/ICMTS.2010.5466872","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466872","url":null,"abstract":"Device temperature is one of the most important limits for the safe operating area and the reliability of power DMOS transistors. Therefore, accurate measurements of their intrinsic device temperature are required. However, standard methods such as IR thermography usually cannot be applied to advanced smart power technologies where a thick power metal layer obscures the - often significantly hotter - active device area. Thus, we propose to embed very small temperature sensors in the active DMOS cell array. These sensors allow for an accurate reading of the intrinsic device temperature while not influencing the DMOS behavior noticeably. The sensors are calibrated up to 600°C, validated by comparison to TIM measurements up to 400°C, and used to investigate thermal runaway. Results from 60 sensors embedded in one large power DMOS with on-chip analog multiplexing are also presented.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"257 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122458836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Test structures for characterization of through silicon vias","authors":"M. Stucchi, D. Perry, G. Katti, W. Dehaene","doi":"10.1109/ICMTS.2010.5466841","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466841","url":null,"abstract":"As silicon technology reaches extreme sub-um dimensions, the industry has reached for “more than Moore” solutions to enable advancements in integration, lower system cost, and improve packaging footprints. Probably the best known of the more-than-Moore solutions is 3D chip stacking using through silicon vias (TSVs). This technology requires accurate characterization of the TSV, the thinned silicon, and the stacked die. Our paper deals with TSV characterization by means of specially designed test structures.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132775703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Takayuki Sekiguchi, S. Amakawa, N. Ishihara, K. Masu
{"title":"On the validity of bisection-based thru-only de-embedding","authors":"Takayuki Sekiguchi, S. Amakawa, N. Ishihara, K. Masu","doi":"10.1109/ICMTS.2010.5466857","DOIUrl":"https://doi.org/10.1109/ICMTS.2010.5466857","url":null,"abstract":"The validity of the thru-only de-embedding method that uses mathematically bisected halves of a left-right symmetric THRU pattern is assessed in this paper. The popularly used T-equivalent representation of a THRU and the bisection thereof is neither unique nor its validity firmly established. It is shown that an equally simple T-equivalent-based bisection gives better results than the T-equivalent-based bisection by comparing the two bisecting methods with a result obtained from an independent method. The thru-only de-embedding method is also compared with the conventional open-short and short-open methods, and the interrelationship among them expected from the assumed equivalent circuit representations of the relevant dummy patterns is confirmed. This is made possible by using the odd-mode responses of symmetric 4-port devices as the 2-ports under study. This way, nonidealities associated with ordinary 2-port dummy patterns is avoided.","PeriodicalId":153086,"journal":{"name":"2010 International Conference on Microelectronic Test Structures (ICMTS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132304241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}