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2019 International Semiconductor Conference (CAS)最新文献

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Technology and Optimizations for the NOI-Nano-Triode noi -纳米三极管的技术与优化
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/SMICND.2019.8923917
C. Ravariu, C. Parvulescu, V. Placinta
{"title":"Technology and Optimizations for the NOI-Nano-Triode","authors":"C. Ravariu, C. Parvulescu, V. Placinta","doi":"10.1109/SMICND.2019.8923917","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923917","url":null,"abstract":"This paper adds some contributions for a Nothing On Insulator (NOI) nano-triode. The concept was introduced first time in 2018. The NOI-nano-triode has the advantages as: reduced sizes as a NOI transistor, a seriously improved subthreshold slope from 650/dec of an experimental vacuum transistor to 210mV/dec of the simulated NOI-nano-triode. The paid price is a non-null gate current. Besides to the optimal architecture with minimum SS parameter, the paper presents a technological flow for this device, aided by Athena tool.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115091401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Significant enhancement of electrical behavior of SAW devices on langasite and quartz substrates obtained by improvements in design and technology 通过设计和技术的改进，在langasite和石英衬底上显著增强了SAW器件的电学性能
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/smicnd.2019.8923862
N. Dumbravescu, O. Ionescu, I. Cernica, V. Buiculescu, F. Pistriţu, Cristina Mitrea
{"title":"Significant enhancement of electrical behavior of SAW devices on langasite and quartz substrates obtained by improvements in design and technology","authors":"N. Dumbravescu, O. Ionescu, I. Cernica, V. Buiculescu, F. Pistriţu, Cristina Mitrea","doi":"10.1109/smicnd.2019.8923862","DOIUrl":"https://doi.org/10.1109/smicnd.2019.8923862","url":null,"abstract":"This paper presents some improvements applied in design and fabrications of SAW devices manufactured on langasite and quartz substrates. For a best design we limited the number of IDTs pairs to 40, we chose the distance between In and Out of IDTs to be an integer number of wavelengths and we enlarged the finger width with 0.5μm. Optimisation of technology was done by applying the following measures: direct loading of the wafer to sputtering installation, heating the substrate to 150 °C during metallization, limiting the thickness of Cr/Au conducting layer to 10 nm/30 nm and eliminating the short circuits by electric means. A yield close to 90% was obtained. The enhanced electrical behaviour of SAWs was analysed and discussed in detail.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133697002","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bionanocomposites based of polylactic acid and silver nanoparticles obtained by solvent evaporation for potential use as biomaterials 以聚乳酸和银纳米粒子为基础的生物纳米复合材料，通过溶剂蒸发获得，具有潜在的生物材料用途
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/SMICND.2019.8923791
P. Preda, M. Râpă, D. Mihaiescu, B. Tincu, M. Avram
{"title":"Bionanocomposites based of polylactic acid and silver nanoparticles obtained by solvent evaporation for potential use as biomaterials","authors":"P. Preda, M. Râpă, D. Mihaiescu, B. Tincu, M. Avram","doi":"10.1109/SMICND.2019.8923791","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923791","url":null,"abstract":"The purpose of the research was to obtain hydrophilic and biocompatible polymeric materials. The obtained bionanocomposites were investigated in terms of biocompatibility by using a fibroblast cell line (NCTC clone L929), water contact angle measurements, morphology (by SEM measurements) and structural composition (by ATRFTIR analysis). The experimental results have suggested that the increase of AgNPs concentration induced the cytotoxic effect for tested variants.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121985938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
New approaches towards chemosensing 化学传感的新方法
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/SMICND.2019.8923800
Dawid Przyczyna, K. Pilarczyk, Andrzej Blachecki, V. Gorokh, K. Szaciłowski
{"title":"New approaches towards chemosensing","authors":"Dawid Przyczyna, K. Pilarczyk, Andrzej Blachecki, V. Gorokh, K. Szaciłowski","doi":"10.1109/SMICND.2019.8923800","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923800","url":null,"abstract":"Sensing and information processing can be considered as two sides of a coin. They are strictly bound together at the formal and functional level. This contribution presents novel semiconducting materials – cadmium sulphidealizarin complexone hybrids, which at the same time perform chemosensing and post-processing of analytical signal according to reservoir computing paradigms and basic rules of fuzzy logic.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"335 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124708472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Image processing technology for scanning electron microscopy 扫描电子显微镜图像处理技术
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/SMICND.2019.8924031
O. Tutunaru, R. Pascu
{"title":"Image processing technology for scanning electron microscopy","authors":"O. Tutunaru, R. Pascu","doi":"10.1109/SMICND.2019.8924031","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8924031","url":null,"abstract":"Quantification of the noise content in the scanning electron microscope image is an important parameter in the signal-to-noise ratio. The most common type of noise in SEM image is the Gaussian noise. We compared different noise reduction filters, like average, median, Gaussian Smoothing and Wiener filters, in order to see the image improvement. Based on the experiment results the most promising is the Wienerfilter.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126352703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
CAS 2019 Sponsors
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/smicnd.2019.8923922
{"title":"CAS 2019 Sponsors","authors":"","doi":"10.1109/smicnd.2019.8923922","DOIUrl":"https://doi.org/10.1109/smicnd.2019.8923922","url":null,"abstract":"","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115737460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 5.5-V 7-MHz UGBW Dual Rail-to-Rail CMOS Op Amp with Enable Pin and Hi-Z Output Feature 5.5 v 7mhz UGBW双轨对轨CMOS运算放大器，带使能引脚和Hi-Z输出功能
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/SMICND.2019.8924013
C. Stănescu, C. Dinca, David Paul
{"title":"A 5.5-V 7-MHz UGBW Dual Rail-to-Rail CMOS Op Amp with Enable Pin and Hi-Z Output Feature","authors":"C. Stănescu, C. Dinca, David Paul","doi":"10.1109/SMICND.2019.8924013","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8924013","url":null,"abstract":"The paper presents a dual rail-to-rail CMOS op amp having a unity-gain bandwidth (UGBW) better than 7 MHz across the 2.5-5.5 V supply range. The circuit has an Enable pin and, during Disable status, its outputs are in Hi-Z, avoiding current flowing into circuit from the load that is prone to get higher than the supply voltage. It was fabricated using a $0.25 {mu} mathrm{m}$ BCD process. The amplifier has a maximum offset voltage of 1 mV, a minimum PSRR of 95 dB, a minimum CMRR of 66 dB, a minimum open-loop gain of 100 dB, and a voltage noise spectral density of 20 nV/$surd$Hz at 10 kHz, while consuming $850 {mu} mathrm{A}$ per channel. The die area is only 1 mm2 and has no package, but 9 bumps.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"4 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116864682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Process Capability Evaluation for Fabrication of ASIC IR-UWB Transceivers ASIC IR-UWB收发器制造工艺能力评估
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/SMICND.2019.8923859
N. Varachiu, J. Noullet, A. Rumeau, D. Dragomirescu
{"title":"Process Capability Evaluation for Fabrication of ASIC IR-UWB Transceivers","authors":"N. Varachiu, J. Noullet, A. Rumeau, D. Dragomirescu","doi":"10.1109/SMICND.2019.8923859","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923859","url":null,"abstract":"This paper presents process capability evaluation for a lot of five ASIC prototypes of an impulse radio ultra-wideband transceiver (IR-UWB), fabricated in the white room facility of LAAS Toulouse, France, in ST Microelectronics CMOS 65 nm technology. The main purpose of our undertaken is, starting from the Voice of the Customer (VoC) -offered by an outstanding industrial aeronautic consortium - to provide an evaluation of manufacturing process capability, at different confidence levels, as usually required in industry.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114689039","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Integrated Circuits – Student Papers 集成电路-学生论文
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/smicnd.2019.8923756
{"title":"Integrated Circuits – Student Papers","authors":"","doi":"10.1109/smicnd.2019.8923756","DOIUrl":"https://doi.org/10.1109/smicnd.2019.8923756","url":null,"abstract":"","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114835122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application-Aware Lifetime Model for Power Devices based on Electro-Thermal Simulation 基于电热仿真的电力器件应用感知寿命模型
2019 International Semiconductor Conference (CAS) Pub Date : 2019-10-01 DOI: 10.1109/SMICND.2019.8923773
Ciprian V. Pop, Andi Buzo, C. Diaconu, G. Pelz, H. Cucu, C. Burileanu
{"title":"Application-Aware Lifetime Model for Power Devices based on Electro-Thermal Simulation","authors":"Ciprian V. Pop, Andi Buzo, C. Diaconu, G. Pelz, H. Cucu, C. Burileanu","doi":"10.1109/SMICND.2019.8923773","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923773","url":null,"abstract":"The active cycling (repetitive clamping) of power devices is a time consuming process. For this reason, a limited amount of reliability data is available and the manufacturers most often provide the lifetime parameters only for a few specific operating conditions. According to the well-known Coffin-Manson lifetime model, the key is the estimation of the maximum junction temperature swing. The paper proposes a methodology for estimation of the maximum junction temperature swings on different operating conditions, based on electro-thermal simulations. Furthermore, we propose an extension of the classical Coffin-Manson model so that it can be applied on different operating conditions and for a predefined failure criterion. The coefficients of the model are fitted based on experimental data. The leave-one-out and bootstrapping validation methods show a maximum relative error of 25%. The proposed application-aware lifetime model is robust and simple, having only a small number of coefficients to be fitted.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122870090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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