{"title":"Genetic algorithms for high-order sliding-mode observers","authors":"O. Datcu, R. Hobincu, C. Macovei","doi":"10.1109/SMICND.2019.8923857","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923857","url":null,"abstract":"A previous work proposed a chaos-based private communication scheme. A fourth order differentiator was used to estimate the dynamics of the transmitter, when only one of its states is measured at the receiving end. The choice for the parameters of this estimator was done empirically, evaluating the errors between the original and the estimated evolution. This work adds to this procedure a genetic algorithm which allows an automatization of the decision regarding the values of the parameters which enable the best reconstruction.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"201 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122348323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Verilog-A Model for a Switched-Capacitor DC-DC Converter","authors":"N. Braic, C. Răducan, M. Neag, Vlad Ionescu","doi":"10.1109/SMICND.2019.8923722","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923722","url":null,"abstract":"This paper presents the development and validation of a Verilog-A behavioral model for a switched capacitor DC-DC converter. For each converter component block, a behavioral model was created and validated, comparing simulation results with the correspondent transistor level implementation. The model was developed to allow the control of the switches ON resistance and dead time between operation phases. Using the behavioral model, the impact on the output voltage ripple amplitude of the switches RON, dead time, capacitors ESR and output track parasitic resistance was evaluated.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114578728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Gm Based Voltage Mode Capacitance Multiplier","authors":"G. Bonteanu, A. Cracan, L. Goras","doi":"10.1109/SMICND.2019.8923788","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923788","url":null,"abstract":"A new transconductor based circuit solution for voltage mode capacitance multiplication is proposed. The solution employs the Miller effect around a voltage amplifier implemented as a transconductance amplifier with another transconductor acting as load impedance, such that the ratio of the two transconductances defines the multiplication factor. Due to transconductance tunability, the multiplication factor is adjustable in a wide range. The proposed solution offers an important advantage with regards to the low frequency behavior in comparison to a current mode Gm-based implementation, recommending the circuit for frequency compensation applications.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130318127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Zeghdar, H. Bencherif, L. Dehimi, F. Pezzimenti, F. D. Della Corte
{"title":"Analysis of the current-voltage-temperature characteristics of Wl4H-SiC Schottky barrier diodes for high performance temperature sensors","authors":"K. Zeghdar, H. Bencherif, L. Dehimi, F. Pezzimenti, F. D. Della Corte","doi":"10.1109/SMICND.2019.8923929","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923929","url":null,"abstract":"The experimental current-voltage- temperature ($I_{D}-V_{D-}$ T)curves of a Wl4H-SiC Schottky barrier (SB) diode are explored by means of a careful simulation analysis. Simulations show a perfect agreement with experimental results for different forward current levels. The fundamental diode parameters, such as the ideality factor and barrier height are T-dependent. In more detail, the barrier height increases while the ideality factor decreases with an increasing temperature. These behaviors are interpreted assuming the thermionic emission (TE) conduction model with a single Gaussian distribution of the SB height. The calculated Richardson constant is 148.8Ac$m^{-2}K^{-2}$. In the low-medium current regime, the diode voltage drop has a good linear dependence on T. For a bias current of 5.97 nA, the coefficient of determination is in excess of 0.9996 and the diode sensitivity is close to 2.33 mV/K corresponding to a temperature error of 1.14 K.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126677123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Livia Alexandra Dinu Gugoasa, Raluca-Ioana Stefan-van Staden, J. V. van Staden, M. Coroş, S. Pruneanu
{"title":"Voltammetric determination of bisphenol A with a silver-reduced graphene oxide composite paste microsensor","authors":"Livia Alexandra Dinu Gugoasa, Raluca-Ioana Stefan-van Staden, J. V. van Staden, M. Coroş, S. Pruneanu","doi":"10.1109/SMICND.2019.8923716","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923716","url":null,"abstract":"A silver-reduced graphene oxide composite paste microsensor was introduced for oxidation of bisphenol A with good stability and sensitivity and LOD of 1.5 nmol L-1. A wide linear level range (5.0 nmol L-1 – 8.0 mmol L-1) proved that the method can be reliably used for further applications in biological samples.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127003360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Andrei Enache, F. Draghici, G. Pristavu, G. Brezeanu
{"title":"Voltage Controlled Oscillator for Small-Signal Capacitance Sensing","authors":"Andrei Enache, F. Draghici, G. Pristavu, G. Brezeanu","doi":"10.1109/SMICND.2019.8923728","DOIUrl":"https://doi.org/10.1109/SMICND.2019.8923728","url":null,"abstract":"Voltage Controlled Oscillator (VCo) for gas measurement with a MOS capacitor sensor is designed starting from an Armstrong topology and a prototype is tested. The VCO ensures a small signal level across the sensor (< 100mV), necessary for precise measurement. A method in which the frequency of the oscillator is maintained constant by adjusting the sensor bias is proposed.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131751484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optimizing GZIP compression accelerator for Zynq FPGAs","authors":"Ovidiu Plugariu","doi":"10.1109/smicnd.2019.8923705","DOIUrl":"https://doi.org/10.1109/smicnd.2019.8923705","url":null,"abstract":"In this paper we present the architecture and design optimizations brought to an FPGA GZIP compressor we previously designed. The initial design could reach a maximum throughput of 1.34 Gbps on a I'irtexb FPGA while the optimized implementation can reach up to 1.84 Gbps using a Zynq-7020 FPGA. The hardware compressor is up to 8x times faster than the software version running on an ARM CPU that has a clock frequency 6. 7x times higher.","PeriodicalId":151985,"journal":{"name":"2019 International Semiconductor Conference (CAS)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115786356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}