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Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93最新文献

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Flip-chip solder joint interconnections and encapsulants in silicon-on-silicon MCM technology: thermally induced stresses and mechanical reliability 硅对硅MCM技术中的倒装芯片焊点互连和密封剂:热诱导应力和机械可靠性
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302145
E. Suhir
{"title":"Flip-chip solder joint interconnections and encapsulants in silicon-on-silicon MCM technology: thermally induced stresses and mechanical reliability","authors":"E. Suhir","doi":"10.1109/MCMC.1993.302145","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302145","url":null,"abstract":"The results of theoretical and experimental investigation of the thermally induced stresses in, and mechanical reliability of, flip chip solder joint interconnections used in Si-on-Si MCM designs are presented. The mechanical behavior of encapsulants in such interconnections and their effect on the stresses in solder joints are also briefly discussed. It is concluded that matched thermal expansion between the chip and the substrate leads to a more reliable interconnection. However, application of thermally matched materials should not be regarded as a panacea which puts right all the mechanical troubles.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116555913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A quasi-static analysis of fuzz button interconnects 模糊按钮互连的准静态分析
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302146
G. Pan, X. Zhu, B. Gilbert
{"title":"A quasi-static analysis of fuzz button interconnects","authors":"G. Pan, X. Zhu, B. Gilbert","doi":"10.1109/MCMC.1993.302146","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302146","url":null,"abstract":"In the analysis, by using the equivalence principle, a set of integral equations is established and solved by a combined point-matching and Galerkin's method. An iterative algorithm is proposed to solve the matrix equations. The inductance is found by the power-current definition. An equivalent nonuniform transmission line is established and waveform simulation is conducted. The results are compared with FDTD results and good agreement is observed.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132467140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A fast four-via multilayer MCM router 一个快速的四通道多层MCM路由器
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302130
Kei-Yong Khoo, J. Cong
{"title":"A fast four-via multilayer MCM router","authors":"Kei-Yong Khoo, J. Cong","doi":"10.1109/MCMC.1993.302130","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302130","url":null,"abstract":"An efficient multilayer general area router, named V4, for MCM and dense PCB designs is presented. The unique feature of the V4 router is that it uses no more than four vias to route every net and yet produces high quality routing solutions. A number of combinatorial optimization techniques are used in the router to produce high quality routing solutions in polynomial time. As a result, it is independent of net ordering, runs much faster, and has far less memory requirement compared to other multilayer general area routers. The router was tested on several examples, including two industrial MCM designs. Compared with the 3-D maze router, on average the V4 router uses 2% less wire length, 31% fewer vias, and runs 26 times faster. Compared with the SLICE router, on average the V4 router uses 4% less wire length and runs 4.6 times faster.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130526802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Integral decoupling capacitance reduces multichip module ground bounce 整体去耦电容减少多片模块地反弹
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302147
T. Takken, D. Tuckerman
{"title":"Integral decoupling capacitance reduces multichip module ground bounce","authors":"T. Takken, D. Tuckerman","doi":"10.1109/MCMC.1993.302147","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302147","url":null,"abstract":"A multichip module technology in which the module's power planes cover the entire module surface and are separated by 0.15- mu m of anodized aluminum (Al/sub 2/O/sub 3/) is discussed. The module provides 50 nF/cm/sup 2/ decoupling capacitance across the power supply planes with negligible series inductance. The large capacitance eliminates the need for most if not all discrete capacitors, thereby saving space, reducing delays and increasing packing density. The negligible inductance yields modules having less inductive voltage drop between power levels than any equivalent module relying on discrete decoupling capacitors.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129254323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 36
The pretreatment of aluminum bondpads for electroless nickel bumping 化学镀镍用铝粘结垫的预处理
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302148
A. Ostmann, J. Simon, H. Reichl
{"title":"The pretreatment of aluminum bondpads for electroless nickel bumping","authors":"A. Ostmann, J. Simon, H. Reichl","doi":"10.1109/MCMC.1993.302148","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302148","url":null,"abstract":"Electroless nickel bumping is a low cost approach to bumping. This method can also be used to convert the aluminum bondpad to a solderable surface (Ni/Au) for flip-chip application. In this study, Ni/P-bumps were produced by electroless nickel plating on different samples. For the pretreatment of aluminum bondpads, a commercial zincate solution was modified. The shear strength and the electrical resistance were investigated for different initial states of aluminum bondpads. It is shown that residues on the aluminum from the semiconductor fabrication can cause an increase in the electrical resistance and a decrease in shear strength. On clean aluminum bondpads, bumps with a shear strength of 180 cN and an electrical resistance below 1 m Omega have been achieved. Thermal cycling shows no significant decrease in the shear strength.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126684530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
A distributed-RCL model for MCM layout MCM布局的分布式rcl模型
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302128
D. Zhou, F. Tsui, J. Cong, D. Gao
{"title":"A distributed-RCL model for MCM layout","authors":"D. Zhou, F. Tsui, J. Cong, D. Gao","doi":"10.1109/MCMC.1993.302128","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302128","url":null,"abstract":"The authors model high-speed VLSI interconnects by using a generic distributed RLC-tree. Through a detailed analysis of the distributed RLC-tree a two-pole approximation system is established to formulate the performance-driven layout in MCM designs. An in-depth study of the formulated performance-driven layout problem reveals the interplay between the interconnector's performance and its geometrical parameters. The study leads to an A-tree topology to optimize the defined performance-driven layout problem. Significant improvement, an average up to 67% reduction on the interconnection delay, is achieved over large sample MCM designs, as compared with the well known Steiner tree topology.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132807029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Balancing performance and cost in CMOS-based thin film multichip modules 基于cmos的薄膜多芯片模块的性能与成本平衡
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302160
R. Frye
{"title":"Balancing performance and cost in CMOS-based thin film multichip modules","authors":"R. Frye","doi":"10.1109/MCMC.1993.302160","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302160","url":null,"abstract":"It is pointed out that dramatic increases in the level of integration available on a single chip have led to significant changes in thinking about the role of advanced packaging in systems. In particular, multichip modules are much smaller than originally envisioned. The interconnection structure, however, has for the most part remained unchanged despite this evolution. For most applications, it is over-designed and more expensive than necessary. The way these changes have impacted on silicon-on-silicon technology, and some of the performance trade-offs of an alternative, low-cost substrate are examined. In most cases, even the low-cost alternative technology offers interconnection bandwidth beyond currently available digital chip capabilities. Optimizing for low power consumption may be a better approach for some systems.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"129 12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123616939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Design tradeoffs among MCM-C, MCM-D and MCM-D/C technologies MCM-C、MCM-D和MCM-D/C技术之间的设计权衡
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302159
A. Iqbal, M. Swaminathan, M. Nealon, A. Omer
{"title":"Design tradeoffs among MCM-C, MCM-D and MCM-D/C technologies","authors":"A. Iqbal, M. Swaminathan, M. Nealon, A. Omer","doi":"10.1109/MCMC.1993.302159","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302159","url":null,"abstract":"Design tradeoffs in electrical performance, wiring density and cost for MCM-C, MCM-D and MCM-D/C technologies are described. MCM-C includes cofired alumina (AlO) substate using molybdenum metallization and cofired glass-ceramic (GC) substrate using copper metallization. MCM-D technology options include a 2-level (coplanar) and a 4-level (triplate) structures utilizing copper in polyimide. MCM-D/C comprises the hybrid of the aforementioned thin and thick film technologies leading to 3, 4 and 5-level thin film options on top of cofired ceramic substrates. The thin film technologies presented represent a range of ground-rule complexity from 25- mu m to 100- mu m pitch. It is concluded that the choice of a particular MCM technology should be application-specific in terms of its cost, performance and wiring density tradeoffs.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121102628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Membrane multichip module technology on silicon 硅膜多芯片模块技术
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302149
W. Cheng, M.A. Beiley, S.S. Wong
{"title":"Membrane multichip module technology on silicon","authors":"W. Cheng, M.A. Beiley, S.S. Wong","doi":"10.1109/MCMC.1993.302149","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302149","url":null,"abstract":"A membrane multichip module fabricated on a silicon substrate by utilizing conventional IC processing techniques is discussed. A chip attachment technology to make electrical connections between the wires on a chip and those on the substrate in the membrane area is described. The contacts between the chips and the module are defined by conventional IC photolithography and formed by metal deposition so that they can be very small and dense. The contacts can be located anywhere over an entire chip and not limited just to the edges. The strong bonding of polyimide can ensure the reliability of the modules. The resistance of 10*10- mu m/sup 2/ and 20*20- mu m/sup 2/ contacts is 0.060 Omega /contact and 0.024 Omega /contact, respectively. Multiple-layers of metals are embedded into the membrane to increase the flexibility of routing between chips.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"295 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127310054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Electron-beam MCM substrate tester 电子束MCM衬底测试仪
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302150
M. Brunner, R. Schmid
{"title":"Electron-beam MCM substrate tester","authors":"M. Brunner, R. Schmid","doi":"10.1109/MCMC.1993.302150","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302150","url":null,"abstract":"An electron beam MCM substrate tester that is now installed in a fabrication line is discussed. It provides a spot size of below 25- mu m to probe pads in a 30 cm*30 cm field without mechanical movement. The test speed is 1000 networks in 15 s. The tester is automated for fabrication environment and ease of operation. Several hundred substrates have already been tested on the system while not missing any defect.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132684132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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