International Journal of Circuit Theory and Applications最新文献_第3页

Three-Phase AC/DC Converter Based on Swiss Rectifier and Interleaved Three-Rail LLC-DCX With Only Front-Stage Control 基于瑞士整流器和交错三轨plc - dcx的仅前置控制三相AC/DC变换器

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-01-04 DOI: 10.1002/cta.70297

Huipeng Jiang, Qiuxia Yang, Jing Yuan, Deyu Wang, Qinglin Zhao

{"title":"Three-Phase AC/DC Converter Based on Swiss Rectifier and Interleaved Three-Rail LLC-DCX With Only Front-Stage Control","authors":"Huipeng Jiang, Qiuxia Yang, Jing Yuan, Deyu Wang, Qinglin Zhao","doi":"10.1002/cta.70297","DOIUrl":"https://doi.org/10.1002/cta.70297","url":null,"abstract":"<div>\u0000 \u0000 <p>This article proposes a two-stage charging topology for automated guided vehicle (AGV), combining a front-stage Swiss rectifier for wide-range voltage regulation and a rear-stage interleaved three-rail LLC resonant converter acting as an isolated DC transformer (DCX). Unlike conventional boost-type rectifiers, the Swiss rectifier employs a buck-type topology, which significantly reduces the voltage stress on power devices. It achieves high power factor (PF) and low input current total harmonic distortion (THD) through a harmonic injection network. The rear-stage interleaved three-rail LLC resonant converter operates near its resonant frequency, leveraging soft-switching techniques and a star-connected topology to minimize switching losses and ensure balanced phase currents, achieving a peak efficiency of 97.5%, eliminating the need for rear-stage control loops. The overall charger achieves a peak efficiency of 95.6% with excellent voltage regulation. This work establishes a high-efficiency framework for AGV charging, which can cooperate with the wide range regulation of Swiss rectifier and the efficient isolated output of LLC-DCX under a simplified front control scheme.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4683-4698"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

High-Gain Isolated Bidirectional DC–DC Converter for Hybrid Fuel Cell Electric Vehicles 用于混合燃料电池汽车的高增益隔离双向DC-DC变换器

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-01-06 DOI: 10.1002/cta.70309

Shubham Gupta, Makarand M. Lokhande

{"title":"High-Gain Isolated Bidirectional DC–DC Converter for Hybrid Fuel Cell Electric Vehicles","authors":"Shubham Gupta, Makarand M. Lokhande","doi":"10.1002/cta.70309","DOIUrl":"https://doi.org/10.1002/cta.70309","url":null,"abstract":"<div>\u0000 \u0000 <p>In fuel cell electric vehicles (FCEVs), a large number of fuel cell (FC) packs need to be connected in series to match the DC bus voltage, which can cause charging imbalance issues. FC is also unsuitable for storing the energy generated during deceleration events or downhill movement. To address these issues, FC in combination of ultracapacitor (UC) is interfaced with proposed isolated bidirectional DC–DC converter (IBDC). Proposed converter is a modified version of a single-ended primary inductor capacitor (SEPIC) converter. It offers high-voltage gain and a noninverted output, which provides proper matching with the DC link voltage. Galvanic isolation and continuous input current is also achieved with the proposed converter for better performance of the FC/UC source. Compared with isolated SEPIC (iSEPIC) for the same power rating, the proposed topology requires a lower coupled inductor (CI) size, which reduces the size and weight of the converter. Furthermore, bidirectional capability enables regeneration during deceleration and downhill movement. In addition, a nonideal analysis of the converter is presented and small-signal modeling is developed for control design. A 200-W hardware prototype is developed, and experimental results confirm the effectiveness of the proposed converter with 91.6% analytical and 90.9% experimental efficiency.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4699-4714"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Stability Study of a Broadband Current Source for Electrical Impedance Tomography 用于电阻抗断层成像的宽带电流源稳定性研究

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-01-15 DOI: 10.1002/cta.70323

Allaire Doussan, Ryan Halter

{"title":"Stability Study of a Broadband Current Source for Electrical Impedance Tomography","authors":"Allaire Doussan, Ryan Halter","doi":"10.1002/cta.70323","DOIUrl":"https://doi.org/10.1002/cta.70323","url":null,"abstract":"<div>\u0000 \u0000 <p>This study investigates external compensation strategies to improve stability and bandwidth of an inverting negative dual configuration (INDC) Howland current source for electrical impedance tomography (EIT) applications. Fifteen compensation schemes were simulated and experimentally tested for an INDC Howland topology designed to output 100–350 μA across resistive (100 Ω–20 kΩ) and complex (parallel RC) loads. Performance was evaluated based on phase margin, AC peaking, flatness, percent error, and −3-dB bandwidth across 100 Hz–20 MHz. The six best performing topologies were identified and underwent the full analysis. The best performing design incorporates Miller compensation capacitors at three locations (<i>C</i><sub>f−</sub>, <i>C</i><sub>f+</sub>, <i>C</i><sub>g</sub>) with a 5 MHz pole frequency. Simulations demonstrated −3-dB bandwidth ≥ 1 MHz for loads ≤ 15 kΩ, with a phase margin ≥ 60° at 1 MHz for all loads. Experimentally, −3-dB bandwidth ≥ 1 MHz was maintained up to 3 kΩ, with a phase margin ≥ 60° at 1 MHz for all loads. Compared with previous literature, our design achieved a > 2× improvement in flatness experimentally (1.86% vs. 4% up to 1 MHz) and extended stable operation to higher frequencies and larger load ranges. External compensation methods improve performance and stability beyond what internal op-amp compensation alone achieves. Performance advantages were validated across a broader frequency and load range than previous INDC Howland implementations. This work establishes a systematic framework for examining broadband current sources for EIT, enabling accurate, stable current injection across clinically relevant impedance ranges and frequencies up to 1 MHz.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4537-4550"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Perspective on the Algebra, Topology, and Logic of Electrical Networks 电力网络的代数、拓扑与逻辑透视

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-02-18 DOI: 10.1002/cta.70359

Marko Orešković, Ivana Kuzmanović Ivičić, Juraj Benić, Mario Essert

{"title":"A Perspective on the Algebra, Topology, and Logic of Electrical Networks","authors":"Marko Orešković, Ivana Kuzmanović Ivičić, Juraj Benić, Mario Essert","doi":"10.1002/cta.70359","DOIUrl":"https://doi.org/10.1002/cta.70359","url":null,"abstract":"<div>\u0000 \u0000 <p>This paper presents a unified algebraic, topological, and logical framework for electrical one-port networks based on Šare's \u0000<span></span><math>\u0000 <mi>m</mi></math>-theory. Within this formalism, networks are represented by \u0000<span></span><math>\u0000 <mi>m</mi></math>-words (jorbs) over an ordered alphabet, where series and parallel composition induce an \u0000<span></span><math>\u0000 <mi>m</mi></math>-topology on \u0000<span></span><math>\u0000 <mi>m</mi></math>-graphs with a theta mapping \u0000<span></span><math>\u0000 <mi>ϑ</mi></math> that preserves one-port equivalence. The study formalizes quasiorders, shells, and cores, showing their structural correspondence to network boundary conditions and impedance behavior. The \u0000<span></span><math>\u0000 <mi>λ</mi></math>–\u0000<span></span><math>\u0000 <mi>Δ</mi></math> metric, together with the valuation morphism \u0000<span></span><math>\u0000 <mi>Φ</mi></math>, provides a concise descriptor of the impedance-degree structure. In the computational domain, the framework is extended with algorithmic procedures for generating and classifying nonisomorphic series–parallel topologies, accompanied by programmatic Cauer/Foster synthesis workflows and validation against canonical examples from Ladenheim's catalog. The resulting approach enables symbolic-to-topological translation of impedance functions, offering a constructive bridge between algebraic representation and electrical realization. Overall, the paper outlines a self-consistent theoretical and computational foundation for automated network synthesis, classification, and formal verification within the emerging field of Jorbology. The framework is also positioned for future extension to multiport (MIMO) networks, where jorbs act as combinatorial indices for efficient classification prior to full matrix-based analysis.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4588-4604"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878515","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Ultra-High Step-Up Quadratic DC–DC Converter Based on Three-Winding Coupled-Inductor 基于三绕组耦合电感的超高升压二次型DC-DC变换器

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-01-02 DOI: 10.1002/cta.70292

Mingfa Yang, Yihan Liu, Haibin Li, Yin Chen, Hongkai Zheng, Tao Jin

{"title":"Ultra-High Step-Up Quadratic DC–DC Converter Based on Three-Winding Coupled-Inductor","authors":"Mingfa Yang, Yihan Liu, Haibin Li, Yin Chen, Hongkai Zheng, Tao Jin","doi":"10.1002/cta.70292","DOIUrl":"https://doi.org/10.1002/cta.70292","url":null,"abstract":"<div>\u0000 \u0000 <p>A novel nonisolated high gain DC–DC converter for renewable energy generation systems is proposed in this article. The converter integrates three-winding coupled inductor, voltage multiplier cell and quadratic boost circuit, significantly enhancing the voltage-boosting capability. The unique boost structure, formed by the three-winding coupled inductor and the voltage multiplier cell, enables the converter to achieve a high voltage gain with a low total turns ratio of the coupled inductor and an appropriate duty cycle. Additionally, the three-winding coupled inductor enhances the flexibility of voltage gain adjustment. The input side of the proposed converter is connected to an independent inductor, which simplifies the realization of continuous input current and the reduction of current ripple. The low voltage stress on the switching devices and the clamping diode facilitates the selection of switching devices with low conduction losses and fast recovery diodes contributing to improved converter efficiency. This paper provides a detailed discussion of the steady-state analysis, parameter design, and loss analysis of the proposed converter, along with a comparison with existing high-gain converters. Finally, an experimental prototype was built based on the design principles, and the experimental results validate the effectiveness of the proposed converter.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4665-4682"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878273","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Dynamic Study and Microcontroller Realization of a Single Fractional-Order Hopfield Neuron Model Under Autapse and Electromagnetic Radiation Effects 单分数阶Hopfield神经元模型在自灭和电磁辐射作用下的动态研究与微控制器实现

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-01-01 DOI: 10.1002/cta.70268

Arsene Loic Mbanda Biamou, Victor Kamdoum Tamba, Viet-Thanh Pham, Giuseppe Grassi, François Kapche Tagne, Armand Cyrille Nzeukou Takougang

{"title":"Dynamic Study and Microcontroller Realization of a Single Fractional-Order Hopfield Neuron Model Under Autapse and Electromagnetic Radiation Effects","authors":"Arsene Loic Mbanda Biamou, Victor Kamdoum Tamba, Viet-Thanh Pham, Giuseppe Grassi, François Kapche Tagne, Armand Cyrille Nzeukou Takougang","doi":"10.1002/cta.70268","DOIUrl":"https://doi.org/10.1002/cta.70268","url":null,"abstract":"<div>\u0000 \u0000 <p>The initial <i>Hopfield neural network</i> (HNN) model, which emulates the nervous system, was conceived without considering the impact of some external effects such as electromagnetic phenomena. It used a resistor to mimic the self-coupling synapse of the neuron. Due to their nonlinearity, modifiability, and nonvolatility, memristors can reproduce natural synapses with great precision. They can simulate the self-coupling synapse of the neuron, as well as the effects of the electromagnetic phenomena on the neurons. In this work, we propose and study the dynamic behaviors of a memristive single fractional-order Hopfield neuron (MSFHN) model with a self-coupling synapse and affected by electromagnetic radiation. The stability of the stationary points is studied. The solutions of the model are carried out using one of the most efficient and reliable techniques called the Adomian decomposition method (ADM). The dynamic behaviors of the model are investigated based on the self-coupling strength, the coupling strength between the membrane potential and the magnetic flux, the fractional order, and the initial conditions using common methods for characterizing dynamic systems. Numerical findings indicate that the proposed single fractional-order neuron model exhibits a variety of intricate dynamics such as chaotic behavior, transient transitions, antimonotonicity, and initial boosting behavior. Numerical simulation results are validated with the microcontroller implementation of the MSFHN model.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4514-4536"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Digitally Phase-Programmable Three-Stage Amplifier With Fractional Miller Compensation Capacitor Utilizing the SFG Investigated Cascade Transformation Graph Rules 利用SFG研究了带分数米勒补偿电容的数字相位可编程三相放大器的级联变换图规则

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-01-07 DOI: 10.1002/cta.70257

M. Ghashghai, M. B. Ghaznavi-Ghoushchi

{"title":"A Digitally Phase-Programmable Three-Stage Amplifier With Fractional Miller Compensation Capacitor Utilizing the SFG Investigated Cascade Transformation Graph Rules","authors":"M. Ghashghai, M. B. Ghaznavi-Ghoushchi","doi":"10.1002/cta.70257","DOIUrl":"https://doi.org/10.1002/cta.70257","url":null,"abstract":"<div>\u0000 \u0000 <p>This paper examines the design of a digitally phase-programmable three-stage amplifier, presenting the design process primarily through signal flow graph manipulation. Specifically, a digitally phase-programmable (DPP) dual active-capacitive-feedback compensation (DACFC) amplifier architecture is derived by applying graph transformation rules and graph algebra–based design analysis, starting from the signal flow graph of a DACFC amplifier. The compensation capacitor or the phase margin (PM) of the proposed amplifier is made variable by adjusting the digital input code vector and the value of <i>k</i> placed in the feedback path. Depending on the required value of the PM, this technique enables a three-stage amplifier with programmable compensation capacitor. This technique, using the cascade graph rule, simplifies the edge representing the compensation capacitor in the feedback path. This simplification increases the PM while reducing the chip area occupied by the compensation capacitor (compared to the non-digital compensation capacitor amplifier), especially when <i>k</i> > 1. It has demonstrated effective and favorable results. After mapping the amplifier from the graph domain to the circuit domain, the DPP-DACFC is simulated in 0.18-μm CMOS standard technology. When the capacitive load is <i>C</i><sub><i>L</i></sub> = 500 pF, the compensation capacitor is 2.4 pF, and the <i>k</i> value is set to 1.17 at a unity gain frequency of 3.585 MHz; a PM of 84.7° is achieved. The power consumption is 301 μW, and the DC gain exceeds 100 dB. The average slew rate of 3.09 V/μs and settling time of 0.465 μs are obtained when the proposed amplifier is configured in a unity gain non-inverting configuration. Under a load capacitance of <i>C</i><sub><i>L</i></sub> = 1250 pF, the amplifier maintains a PM of 57°.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4493-4513"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

On the Theoretical Limits of Gain and Matching in Single-Stage High-Frequency Amplifiers 单级高频放大器增益与匹配的理论极限

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2026-01-02 DOI: 10.1002/cta.70300

Antonio Serino, Walter Ciccognani, Sergio Colangeli, Patrick Ettore Longhi, Ernesto Limiti

{"title":"On the Theoretical Limits of Gain and Matching in Single-Stage High-Frequency Amplifiers","authors":"Antonio Serino, Walter Ciccognani, Sergio Colangeli, Patrick Ettore Longhi, Ernesto Limiti","doi":"10.1002/cta.70300","DOIUrl":"https://doi.org/10.1002/cta.70300","url":null,"abstract":"<div>\u0000 \u0000 <p>Active device performances are typically characterized by figures of merit, representing the best achievable values of quantities such as gain, port mismatch, noise figure, and output power. The figures identify the limits for a single-stage amplifier realized using a given active device and, from a design point of view, help to determine whether design goals can be fulfilled. Amplifier design goals always include specifications for gain and port mismatch. Various figures of merit from high-frequency linear circuit theory exist for these quantities, but most are defined under restrictive conditions: fixed impedance termination or conjugate matching at one active device port. This paper analyzes the limits of the small signal performance for a single-stage amplifier with unconstrained port terminations. For this purpose, all possible combinations of gain and port mismatch achievable by an amplifier utilizing a given active device are first investigated; the limits of those performances are then determined. New formulations for the eligible gain and mismatches are derived, and the stability conditions of the circuit corresponding to each achievable performance are addressed. Thanks to the developed analysis, the figures of merit of active devices available in the literature are easily demonstrated. Moreover, design methodologies for microwave amplifiers with a general level of matching at the ports can be developed. As an example, a mismatching chart is proposed that gives all the amplifier performance in terms of the mismatch of the ports.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4570-4579"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Dual Half-Bridge Boost Resonant Inverter for Multiload Induction Heating System 用于多负载感应加热系统的双半桥升压谐振逆变器

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2025-12-31 DOI: 10.1002/cta.70293

Ramesh J, Porpandiselvi S

{"title":"A Dual Half-Bridge Boost Resonant Inverter for Multiload Induction Heating System","authors":"Ramesh J, Porpandiselvi S","doi":"10.1002/cta.70293","DOIUrl":"https://doi.org/10.1002/cta.70293","url":null,"abstract":"<div>\u0000 \u0000 <p>Induction heating (IH) has gained significant attention for its efficiency and performance in heating materials without direct contact. This paper presents the design and experimental evaluation of a novel resonant inverter capable of powering both ferromagnetic (FM) and nonferromagnetic (NFM) loads efficiently using dual half-bridge (DHB) architecture with only three MOSFET switching devices for induction cooking (IC) systems. The inverter operates with dual frequency: a low frequency for FM load and a high frequency for NFM load. The power in FM load is controlled using pulse frequency modulation (PFM), and NFM load is controlled using either PFM or asymmetrical duty cycle (ADC) control, independently and simultaneously. Additionally, the inverter incorporates boost operation to enhance voltage regulation and ensure robust performance under load power varying conditions. The inverter is designed to operate with zero voltage switching (ZVS), minimizing switching losses and improving overall efficiency. An experimental prototype has been developed to deliver a total output power of 660 W, demonstrating the feasibility and effectiveness of the resonant inverter for practical applications.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4627-4640"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Design and Analysis of Adaptive Tuning Wireless Power Transfer System at Transmitter Side of Segmented WPT System 分段WPT系统发射机侧自适应调谐无线功率传输系统设计与分析

IF 1.4 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2026-09-04 Epub Date: 2025-12-30 DOI: 10.1002/cta.70295

Siyu Hou, Yanjin Hou, Xuenan Sun, Jintao Wang, Qianfang Sun, Xingbin Gao, Lijun Cai

{"title":"Design and Analysis of Adaptive Tuning Wireless Power Transfer System at Transmitter Side of Segmented WPT System","authors":"Siyu Hou, Yanjin Hou, Xuenan Sun, Jintao Wang, Qianfang Sun, Xingbin Gao, Lijun Cai","doi":"10.1002/cta.70295","DOIUrl":"https://doi.org/10.1002/cta.70295","url":null,"abstract":"<div>\u0000 \u0000 <p>As the process of Industry 4.0 advances at a high speed, wireless power transmission (WPT) technology is developing at a high speed due to its advantages of dust-free and efficient energy supply. Currently, the conventional multisegment wireless power transmission system (MSWPT) suffers from the problem of high bus voltage due to mutual coupling at the intersection of multiple tracks. In this study, an adaptive tuning control scheme based on a saturable reactor (SR) is proposed, which aims to solve the problem of high DC bus voltage and related device voltage stress caused by cross-coupling between tracks without detuning the system. Firstly, a cross-coupled multitrack model is established based on a two-port network and the effects on the high-frequency inverter and DC bus voltage under different operating states are analyzed; secondly, it is proposed to introduce an SR as adjustable impedance in the proposed LCC compensation topology to perform the tuning; and lastly, a transmitter-side MSWPT system equipped with two sections of 10-m tracks is constructed in this study. The system realizes the backward voltage suppression effect under the operating condition of 80-A track current, achieving an 84.8% reduction in bus voltage (from 606 to 92.2 V).</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 9","pages":"4605-4615"},"PeriodicalIF":1.4,"publicationDate":"2026-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148878388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0