{"title":"A UAV-based computer engineering capstone senior design project","authors":"R. Klenke","doi":"10.1109/MSE.2005.16","DOIUrl":"https://doi.org/10.1109/MSE.2005.16","url":null,"abstract":"The paper describes the development of an unmanned aerial vehicle (UAV) for a capstone senior design project in computer engineering. The student portion of the project involved the development of a flight control system for the UAV. The flight control system was based on the Atmel FPSLIC device. The FPSLIC contains an 8-bit AVR microcontroller and a 40K gate-equivalent field programmable gate array which allowed the students to implement components of the flight control system in both hardware and software. The overall system architecture and implementation of the flight control system are described.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"167 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124674476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Tools for in-circuit testing of on-line content processing hardware","authors":"J. Mitchell, J. Lockwood","doi":"10.1109/MSE.2005.62","DOIUrl":"https://doi.org/10.1109/MSE.2005.62","url":null,"abstract":"Tools have been developed that enable in-circuit testing of content processing hardware. The tools automate test and verification of new circuits using data from a predefined test-bench or with live traffic sent over the Internet. The tools integrate with existing, open-source, Web-based groupware software. Content is processed with field programmable gate arrays (FPGAs) on an open hardware platform.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133852546","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Teaching game theory for computer engineering","authors":"S. Shukla","doi":"10.1109/MSE.2005.54","DOIUrl":"https://doi.org/10.1109/MSE.2005.54","url":null,"abstract":"Microeconomic game theory has been used for analysis of economic, political, and social conflict and cooperation scenarios since the seminal work of Cournot and Stackelberg in the nineteenth century, and the works of von Neumann and his colleagues in the early parts of the twentieth century. Nash equilibrium for competitive games, Bayesian Nash equilibrium for games with incomplete information, subgame perfect equilibrium for repeated games etc., are basic concepts that are taught in almost all economics curricula. Until recently these concepts were virtually unknown to most engineers except for a few academicians. The powerful algorithmic and interpretive techniques of game theory were not an integral part of the engineering tool set provided to engineering students. However many scenarios in computer engineering can be and have been modeled game theoretically, and solution algorithms can be derived as winning strategies in such games. In this short paper we discuss how we have initiated a course offering entitled \"Game Theory for Computer Engineering\", and discuss our experience with this graduate level course for two consecutive years.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115326523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Senior-level embedded system design project using FPGAs","authors":"M. Wirthlin","doi":"10.1109/MSE.2005.49","DOIUrl":"https://doi.org/10.1109/MSE.2005.49","url":null,"abstract":"There is a growing need to provide students with meaningful system-level design (SLD) experiences at the undergraduate level. Relevant SLD skills include the ability to integrate IP from third-party providers, create reusable IP (including appropriate documentation), partition system functionality between software and hardware, and properly integrate real-time functions within an operating system. A senior SLD project was created to provide such an experience for undergraduate students. With cooperation from Xilinx corporation, this single semester course provides students the opportunity to learn SLD skills by creating a single-chip multimedia computer system using FPGAs. Students in this class integrate custom IP and third-party IP into a PowerPC-based system within a single FPGA device. The final product is a real-time multimedia computer system providing both audio and video services. This paper describes the SLD course, beginning by outlining its goals and requirements. Next, the hardware and software infrastructure used by the project is described. Finally, the class schedule is reviewed.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122488114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Gadhiok, R. Hardy, P. Murphy, J. P. Frantz, Hyeokho Choi, Joseph R. Cavallaro
{"title":"An FPGA-based daughtercard for TI's c6000 family of DSKs","authors":"M. Gadhiok, R. Hardy, P. Murphy, J. P. Frantz, Hyeokho Choi, Joseph R. Cavallaro","doi":"10.1109/MSE.2005.19","DOIUrl":"https://doi.org/10.1109/MSE.2005.19","url":null,"abstract":"In this paper we present an FPGA-based daughtercard designed for TIs C6000family of DSP starter kits (DSKs). The hardware, initially designed for a course project, provides a platform for studying heterogeneous systems and hardware software co-design. Students can leverage the DSK-FPGA system for rapid prototyping of signal processing algorithms and to study task-partitioning and system integration. These techniques are becoming increasingly important for system designers as we move to system-on-chip (SoC) devices. The daughtercard hardware is fully functional, and a software package is being developed to provide a seamless communication interface between the DSK and FPGA.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128701937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Using second generation SOPC boards for student design projects","authors":"J. O. Hamblen","doi":"10.1109/MSE.2005.64","DOIUrl":"https://doi.org/10.1109/MSE.2005.64","url":null,"abstract":"This paper describes our recent experiences using a SOPC approach to develop laboratory design projects for undergraduate students in our electrical and computer engineering curriculum. New generation commercial FPGA based SOPC development boards with an embedded RISC processor core and CAD tools are used to support a variety of student design projects.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128461297","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A specialized graduate program in VLSI design tools and technology","authors":"M. Balakrishnan, B. Panwar","doi":"10.1109/MSE.2005.13","DOIUrl":"https://doi.org/10.1109/MSE.2005.13","url":null,"abstract":"This paper describes the features of an interdisciplinary industry-sponsored graduate program in VLSI design tools and technology. An active participation of industry in finalizing the course curriculum by interacting with academia on a graduate project with predefined goals and objectives has popularized this program with the students and sponsoring agencies. The customized course curriculum, with the option of selecting specialized courses on VLSI design and technology, provides uniqueness to the program. This paper describes the interaction and participation methodology of an academic institution in bridging the gap with industry.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129345298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Partnership between venture companies and universities through students' extra-curriculum activities","authors":"K. Yi, Kyeong-Hoon Jung","doi":"10.1109/MSE.2005.43","DOIUrl":"https://doi.org/10.1109/MSE.2005.43","url":null,"abstract":"The objective of this paper is to introduce a new university industry collaboration model for small-sized venture companies. This model recognizes significant aspects of extra-curricular activities ineffectively meeting particular demands of various small-sized companies. We propose to build a collaborative relationship between student clubs at a university and venture companies. Upon the formation of the relationship, each company supports the student clubs by providing financial and technical aids for projects conceived in accordance with specific interests of the company, which will also help the students acquire knowledge and skills required for that specific area the company is targeting. The university plays a role as a mediator and facilitator in enhancing the partnership, supplying equipment and operating the internship program. We expect this model will not only reduce the reeducation cost of the companies but also help them to find new workers who are skilled and experienced in the particular filed of their own. We also presented the case of Handong Global University, Korea, as a successful application of this model.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134096025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"PEER: enriching secondary engineering education through a college summer camp","authors":"Justin Gregg, Tom W. Chen","doi":"10.1109/MSE.2005.44","DOIUrl":"https://doi.org/10.1109/MSE.2005.44","url":null,"abstract":"The Partnership for Engineering Education in the Rockies (PEER) is comprised of local educational and industrial institutions committed to improving the engineering education paths available to students at all levels. Programs start with introductory engineering courses in the 8th grade and scaffold through the high school level. The PEER college summer camp expands on these course offerings to enhance students' learning experience further in a college setting. The camp also brings together secondary students and teachers for an opportunity to extend the reach of the PEER program to new students and schools. The paper provides an overview of PEER, and describes the specific goals and format for the PEER summer camp.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133182450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Impact of an SoC research project on microelectronics education: a case study","authors":"N. Dogan, P. Franzon, Wentai Liu","doi":"10.1109/MSE.2005.35","DOIUrl":"https://doi.org/10.1109/MSE.2005.35","url":null,"abstract":"Microelectronics systems design is a collaborative, multidisciplinary activity, involving the combined efforts of system architects, circuit designers, device engineers, software developers, and process engineers. Semiconductor products are vital to today's $1 trillion/year electronic industry. There is a need for educational programs that prepare engineers for the semiconductor industry. This paper presents the impact of an RF-SoC research project on the career choices of students involved and its broader impact on the microelectronics education in the participating universities. Teaching students the design and test at the physical level is valuable in that it provides the understanding and skills they will need to perform these functions in their subsequent employment.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"1 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123697050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}