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2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)最新文献

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The SoC-Mobinet model in system on chip education 片上系统教育中的SoC-Mobinet模式
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.61
J. Nurmi, J. Madsen, E. Ofner, J. Isoaho, H. Tenhunen
{"title":"The SoC-Mobinet model in system on chip education","authors":"J. Nurmi, J. Madsen, E. Ofner, J. Isoaho, H. Tenhunen","doi":"10.1109/MSE.2005.61","DOIUrl":"https://doi.org/10.1109/MSE.2005.61","url":null,"abstract":"This paper describes the model for developing SoC curricula jointly by industry and academia, where joint effort research results are turned into course contents for SoC-curricula and industry training activities.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134417429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Experts-in-team, interdisciplinary project 专家团队，跨学科项目
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.30
Bjørn B. Larsen
{"title":"Experts-in-team, interdisciplinary project","authors":"Bjørn B. Larsen","doi":"10.1109/MSE.2005.30","DOIUrl":"https://doi.org/10.1109/MSE.2005.30","url":null,"abstract":"The paper introduces experts-in-team (EIT), a novel approach to teaching students to work in interdisciplinary teams, and to learn how each of them influences the team and is influenced by the team. EIT was launched in the engineering degree programme at NTNU, and is now being extended to all master programs at the university. For the 2005 spring term, 1200 students participate in 49 classes.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130869018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Legitimate peripheral participation on FPGA for fine grain microprocessor design education 合法外设参与对FPGA进行细粒度微处理器设计教育
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.39
R. Takahashi, H. Ohiwa
{"title":"Legitimate peripheral participation on FPGA for fine grain microprocessor design education","authors":"R. Takahashi, H. Ohiwa","doi":"10.1109/MSE.2005.39","DOIUrl":"https://doi.org/10.1109/MSE.2005.39","url":null,"abstract":"Legitimate peripheral participation (LPP) is a new model that illustrates the learning process by practical participation, where it is at first legitimately peripheral but increases gradually in engagement and complexity. In a production line, the apprentices are engaged in stages under attenuated situation conditions and thus have an opportunity for observation to get approximate knowledge of the product in the early steps. The very first step is called way-in, which we have found very critical for the success of the whole learning process. Instruction-issue-logic was chosen as such in City-1 microprocessor design education environment , because it is the central part of superscalar microprocessors. Although our junior students had the opportunity for understanding the concept of superscalar through this way-in, FPGAs with 10,000 gates were found to be too small for a framework to move forward to full participation. In 2004, FPGAs with 200,000 gates were introduced that had a reorder buffer with 4 entries. As a results, 16 out of 52 junior students who took the course were successful in bringing their original devices into their microprocessors. This education could be used for training in industry-as well.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"514 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133159097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Use of a soft-core processor in a hardware/software codesign laboratory 软核处理器在硬件/软件协同设计实验室中的应用
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.63
R. Chamberlain, J. Lockwood, S. Gayen, Richard Hough, Phillip H. Jones
{"title":"Use of a soft-core processor in a hardware/software codesign laboratory","authors":"R. Chamberlain, J. Lockwood, S. Gayen, Richard Hough, Phillip H. Jones","doi":"10.1109/MSE.2005.63","DOIUrl":"https://doi.org/10.1109/MSE.2005.63","url":null,"abstract":"This paper describes our experience to date and current plans for a senior-level microelectronics laboratory course on hardware/software codesign. The course utilizes an open-source, soft-core processor deployed on the FPX platform as an integral component of the students' designs. Students write software to execute on a Leon SPARC-compatible processor and write VHDL to implement hardware-accelerated computational functions in FPGA hardware.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128276081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A two-week program for a platform-based SoC design 为期两周的基于平台的SoC设计计划
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.15
Sanggyu Park, S. Chae
{"title":"A two-week program for a platform-based SoC design","authors":"Sanggyu Park, S. Chae","doi":"10.1109/MSE.2005.15","DOIUrl":"https://doi.org/10.1109/MSE.2005.15","url":null,"abstract":"This paper describes a two-week program for a platform-based SoC design using SoCBase 1.0, a platform developed in the Center for SoC Design Technology. This program consists of 4 lectures and 9 laboratories. It covers several design steps from the transaction level to the FPGA prototype level for a Motion JPEG decoder. In this program we employed an SoC design flow based on SoCBase 1.0. It is targeted for graduate students and ASIC designers out in the industry. More than 100 engineers and graduate students have completed this program in 2004.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115509239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Inexpensive student-assembled FPGA / microcontroller board 廉价的学生组装的FPGA /微控制器板
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.37
Sarah L. Harris, D. Harris
{"title":"Inexpensive student-assembled FPGA / microcontroller board","authors":"Sarah L. Harris, D. Harris","doi":"10.1109/MSE.2005.37","DOIUrl":"https://doi.org/10.1109/MSE.2005.37","url":null,"abstract":"Digital design courses need evaluation boards to mount FPGAs or microcontrollers and the appropriate support circuitry. These boards can be costly to purchase and maintain. Harvey Mudd College has developed a series of inexpensive evaluation boards for an embedded systems laboratory class that are assembled and maintained by the students in the class.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114788618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Teaching SoC-oriented computer design course 教授面向soc的计算机设计课程
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.58
Donald Hung
{"title":"Teaching SoC-oriented computer design course","authors":"Donald Hung","doi":"10.1109/MSE.2005.58","DOIUrl":"https://doi.org/10.1109/MSE.2005.58","url":null,"abstract":"As SoC becomes the mainstream design approach for embedded computing systems, a challenging task for the education community is to update the traditional curriculum to reflect the changes in technology. This paper reports the author's experience at San Jose State University in teaching a graduate-level computer design course based on the SoC approach. Motivation, scope of the course, teaching approach and outcomes are presented; ongoing activities and future development plans are mentioned in the conclusion part of the paper.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"25 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123706344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Simplified micro-controller & FPGA platform for DSP applications [educational applications] 用于DSP应用的简化微控制器和FPGA平台[教育应用]
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.50
M. Pradhan
{"title":"Simplified micro-controller & FPGA platform for DSP applications [educational applications]","authors":"M. Pradhan","doi":"10.1109/MSE.2005.50","DOIUrl":"https://doi.org/10.1109/MSE.2005.50","url":null,"abstract":"This paper describes a DSP platform which can be used by engineering students without any third party DSP or FPGA software tools or programming experience. This system enables a student of engineering to venture into the field of DSP with hardware real-time DSP functions. These functions can be accessed or programmed in with a UART terminal program.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115667701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Teaching digital ASIC design to students with heterogeneous previous knowledge 对具有不同知识背景的学生进行数字ASIC设计教学
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.52
H. Hedberg, J. Rodrigues, F. Kristensen, Henrik Svensson, M. Kamuf, V. Öwall
{"title":"Teaching digital ASIC design to students with heterogeneous previous knowledge","authors":"H. Hedberg, J. Rodrigues, F. Kristensen, Henrik Svensson, M. Kamuf, V. Öwall","doi":"10.1109/MSE.2005.52","DOIUrl":"https://doi.org/10.1109/MSE.2005.52","url":null,"abstract":"This paper describes an MSc level digital ASIC project course. The majority of the course participants are international students, having a wide spread in previous knowledge in the field of digital HW-design. A course outline adapting to this fact has been developed, changing from one joint VLSI project towards smaller individual projects. The diversity in previous knowledge is evened out by adding lectures regarding design methodology and used EDA-tools, and making the first part of the course purely laboratory. To enhance and highlight different aspects of HDL-design, mandatory assignments allow the students to gradually take command over the complete design flow. As a result, comprehension of digital ASIC design is increased among the students and course administration is reduced.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115720851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A context-specific electronic design and prototyping course [sensing and notification wearable computing platform] 情境化电子设计与原型设计课程【传感与通知可穿戴计算平台】
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.7
A. Smailagic, D. Siewiorek, Uwe Maurer, Anthony G. Rowe, Karen P. Tang
{"title":"A context-specific electronic design and prototyping course [sensing and notification wearable computing platform]","authors":"A. Smailagic, D. Siewiorek, Uwe Maurer, Anthony G. Rowe, Karen P. Tang","doi":"10.1109/MSE.2005.7","DOIUrl":"https://doi.org/10.1109/MSE.2005.7","url":null,"abstract":"This paper describes a context-specific electronic design and prototyping approach in an innovative project course at Carnegie Mellon. We built a sensing and notification wearable computing platform, called eWatch, for context-aware computing. eWatch senses user activities and provides them with urgent notifications. An accelerometer and microphone provide inputs to a model of user interruptibility levels. A vibration motor for tactile feedback and two ultra bright LEDs for visual feedback provide user notification through different vibration patterns and colors. User studies identified appropriate notification schemes for mobile and office settings. Bluetooth communication connects the eWatch to a PDA or desktop computer for sensor data analysis and notification.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128658052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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