H. Hedberg, J. Rodrigues, F. Kristensen, Henrik Svensson, M. Kamuf, V. Öwall
{"title":"Teaching digital ASIC design to students with heterogeneous previous knowledge","authors":"H. Hedberg, J. Rodrigues, F. Kristensen, Henrik Svensson, M. Kamuf, V. Öwall","doi":"10.1109/MSE.2005.52","DOIUrl":null,"url":null,"abstract":"This paper describes an MSc level digital ASIC project course. The majority of the course participants are international students, having a wide spread in previous knowledge in the field of digital HW-design. A course outline adapting to this fact has been developed, changing from one joint VLSI project towards smaller individual projects. The diversity in previous knowledge is evened out by adding lectures regarding design methodology and used EDA-tools, and making the first part of the course purely laboratory. To enhance and highlight different aspects of HDL-design, mandatory assignments allow the students to gradually take command over the complete design flow. As a result, comprehension of digital ASIC design is increased among the students and course administration is reduced.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2005.52","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
This paper describes an MSc level digital ASIC project course. The majority of the course participants are international students, having a wide spread in previous knowledge in the field of digital HW-design. A course outline adapting to this fact has been developed, changing from one joint VLSI project towards smaller individual projects. The diversity in previous knowledge is evened out by adding lectures regarding design methodology and used EDA-tools, and making the first part of the course purely laboratory. To enhance and highlight different aspects of HDL-design, mandatory assignments allow the students to gradually take command over the complete design flow. As a result, comprehension of digital ASIC design is increased among the students and course administration is reduced.