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2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)最新文献

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Revolution in electronic EDA education/research: GOSPL 电子EDA教育/研究的革命:福音
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.48
R. Sud, M. Chaitanya
{"title":"Revolution in electronic EDA education/research: GOSPL","authors":"R. Sud, M. Chaitanya","doi":"10.1109/MSE.2005.48","DOIUrl":"https://doi.org/10.1109/MSE.2005.48","url":null,"abstract":"This paper discusses how GOSPL (Generalized Open Source Programmable Logic), the world's first and only complete, commercially viable hardware/software electronics platform is a dramatic and major step forward in semiconductor and electronic design automation education/research worldwide. Never before in the history of the world has the work of 300 people over 5 years representing over one million lines of EDA software code and corresponding programmable system on chip semiconductor IP architecture been made available to the global university system. It allows global education, research, innovation and entrepreneurialism for universities to play the commercially viable EDA and VLSI IP game.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115651377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Teaching SoC design in a project-oriented course based on robotics 在基于机器人技术的专案导向课程中教授SoC设计
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.57
A. C. Barros, Pericles Lima, Juliana Xavier, M. Lima
{"title":"Teaching SoC design in a project-oriented course based on robotics","authors":"A. C. Barros, Pericles Lima, Juliana Xavier, M. Lima","doi":"10.1109/MSE.2005.57","DOIUrl":"https://doi.org/10.1109/MSE.2005.57","url":null,"abstract":"The fast growing complexity and short time-to-market of embedded systems designs, besides the great increase in capacity of today's chips, are mobilizing the industry towards to the development of system-on-chip (SoC) solutions and platform based designs. However, as the complexity of such systems grows, the problems associated with the integration of the IP-cores necessary to form the system arise as a major problem in the design flow. In a case study approach, based on robotics, teaching students the synthesis design flow in a rapid prototyping platform for SoC, provides them the understanding and skills they need to perform such function in their subsequent employment. This paper describes a design flow, for a project-oriented course, to help designers to gain productivity by using the SoC approach on FPGA, while avoiding integration problems by introducing automatic tools. This methodology has been used in undergraduate and graduate digital system design classes.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123993548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A cohesive FPGA-based system-on-chip design curriculum 一个内聚fpga的片上系统设计课程
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.5
J. Lynch, D. Hammerstrom, R. Kravitz
{"title":"A cohesive FPGA-based system-on-chip design curriculum","authors":"J. Lynch, D. Hammerstrom, R. Kravitz","doi":"10.1109/MSE.2005.5","DOIUrl":"https://doi.org/10.1109/MSE.2005.5","url":null,"abstract":"A graduate-level computer engineering course sequence at the OGI School of Science and Engineering teaches state-of-the-art digital system design practices and system-on-chip design concepts. Commercial electronic design automation (EDA) software in conjunction with high-density programmable logic devices allows students to design projects of significant complexity. The course sequence, targeted for both full-time students, and part time students from local high-tech companies, consists of three consecutive courses taught fall, winter, and spring quarters. The first course covers logic design using Verilog, the second introduces logic synthesis and system-on-chip design concepts, and the third addresses timing and test of digital systems.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116970554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Teaching nanotechnology by introducing crossbar-based architecture and quantum-dot cellular automata 透过引入横杆架构及量子点元胞自动机，讲授奈米科技
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.56
Minsu Choi, N. Park
{"title":"Teaching nanotechnology by introducing crossbar-based architecture and quantum-dot cellular automata","authors":"Minsu Choi, N. Park","doi":"10.1109/MSE.2005.56","DOIUrl":"https://doi.org/10.1109/MSE.2005.56","url":null,"abstract":"The end of photolithography as the driver for Moore's law is predicted within seven to twelve years and six different emerging technologies (mostly nanoscale) are expected to replace the current CMOS-based system integration paradigm. As nanotechnology is emerging, (1) there is a strong need for well-educated nanoscale systems engineers by industry, and (2) research and education efforts are also called to overcome numerous nanoscale systems issues. This paper is to propose a way to teach nanotechnology by introducing two emerging technologies: crossbar-based nanoarchitecture and quantum-dot cellular automata.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114554442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Remote laboratory support for an introductory microprocessor course 微处理器入门课程的远程实验室支持
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.47
L. Gomes, Anikó Costa
{"title":"Remote laboratory support for an introductory microprocessor course","authors":"L. Gomes, Anikó Costa","doi":"10.1109/MSE.2005.47","DOIUrl":"https://doi.org/10.1109/MSE.2005.47","url":null,"abstract":"Introductory microprocessor design courses can benefit from the usage of laboratory assignments, leading, normally, to high rates of laboratory space and time occupation. In this paper, a remote laboratory is proposed in order to alleviate the laboratory's physical occupation. An 8031 microcontroller based set-up was used to support a set of experiments. Local and remote accesses to the experiments are possible, supported by the LabView environment, and complemented by a specific virtual workbench adaptor to emulate user presence.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124429945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Hardware/software co-training lab: from VHDL bit-level coding up to CASE-Tool based system modeling 硬件/软件协同训练实验室:从VHDL位级编码到基于CASE-Tool的系统建模
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.34
C. Bieser, K. Müller-Glaser, J. Becker
{"title":"Hardware/software co-training lab: from VHDL bit-level coding up to CASE-Tool based system modeling","authors":"C. Bieser, K. Müller-Glaser, J. Becker","doi":"10.1109/MSE.2005.34","DOIUrl":"https://doi.org/10.1109/MSE.2005.34","url":null,"abstract":"This paper focuses on the combination of educating hardware as well as software development in one laboratory. The needs to offer such a co-training concept arise from the demands of industry towards the desired skills of today's engineers. Their view must no longer be restricted to his/her own work, but has to be widened to a complete system view. To provide an appropriate educational scheme, the university courses have to adapt to these changes. Therefore an innovative lab concept is presented here. The goal is to improve student's skills in multiple directions to deliver an efficient inter-disciplinary hardware/software lab course, based on the training of state-of-the-art industrial architectures and relevant tools.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132889720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A Simulink-to-FPGA implementation tool for enhanced design flow [educational applications] 用于增强设计流程的Simulink-to-FPGA实现工具[教育应用]
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.12
M. Shanblatt, B. Foulds
{"title":"A Simulink-to-FPGA implementation tool for enhanced design flow [educational applications]","authors":"M. Shanblatt, B. Foulds","doi":"10.1109/MSE.2005.12","DOIUrl":"https://doi.org/10.1109/MSE.2005.12","url":null,"abstract":"With the continued growth in complexity of FPGA-based designs, the need for a more flexible and efficient design methodology has arisen. Currently, most designs are accomplished through the use of HDL-centric flows. However, device densities have increased at a pace that such flows have become both cumbersome and outdated. The need for a more innovative and higher-level design flow that directly incorporates model simulation with hardware implementation is needed. Simulink is a well-known tool which allows designers to model a system at a high level and is ideal for certain classes of applications, such as automotive control. The complication of using such a tool for both modeling and hardware implementation is that there currently exists no tool chain to generate hardware from the basic Simulink blockset. This research aims to bridge that gap and provide students a way to perform high-level modeling and hardware implementation in a timely manner for design projects.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124602755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
A complete MP3 decoder on a chip 一个完整的MP3解码器在一个芯片
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.6
H. Hedberg, T. Lenart, Henrik Svensson
{"title":"A complete MP3 decoder on a chip","authors":"H. Hedberg, T. Lenart, Henrik Svensson","doi":"10.1109/MSE.2005.6","DOIUrl":"https://doi.org/10.1109/MSE.2005.6","url":null,"abstract":"The paper presents the results from a course project which focused on all levels in ASIC design flow by implementing a complete MP3 decoder. Two student teams developed a decoder targeting ASIC and FPGA, respectively. The ASIC decoder, fabricated in a 0.35 /spl mu/m process from AMI Semiconductor, consumes 40 mW with a supply voltage of 2 V running at 12 MHz. The FPGA decoder has been implemented and verified on a Virtex-II platform.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120955473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Building up a course in reconfigurable computing 开设可重构计算课程
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.22
C. Bobda
{"title":"Building up a course in reconfigurable computing","authors":"C. Bobda","doi":"10.1109/MSE.2005.22","DOIUrl":"https://doi.org/10.1109/MSE.2005.22","url":null,"abstract":"The last decade has experienced an increase interest on reconfigurable computing (RC). This evolution was boosted by FPGA which have grown from simple glue logic elements to complex devices able to implement several complex hardware applications and be partially and dynamically reconfigured at run-time. Despite the high number of courses offered in the last years in reconfigurable computing, we could not find a course covering all aspects of reconfiguration. The large majority of reconfigurable computing courses are limited to FPGA programming. This is in part due to the fact that no textbook actually exists in this area. In this paper, we present our experience in providing a course in RC from the scratch. Our goal in designing this course is to provide a strong theoretically and practical background to students by covering all aspects of RC as usually reflected in conferences and industry.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129381875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A platform FPGA-based hardware-software undergraduate laboratory 一种基于fpga平台的硬件软件本科实验室
2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI: 10.1109/MSE.2005.10
J. Schneider, M. Bezdek, Ziyu Zhang, Zhao Zhang, D. Rover
{"title":"A platform FPGA-based hardware-software undergraduate laboratory","authors":"J. Schneider, M. Bezdek, Ziyu Zhang, Zhao Zhang, D. Rover","doi":"10.1109/MSE.2005.10","DOIUrl":"https://doi.org/10.1109/MSE.2005.10","url":null,"abstract":"Almost all universities offer introductory courses that focus on microcontroller-based systems and embedded programming. Advanced course offerings vary, and are often not available until the graduate level, leaving a gap in training undergraduates. However, courses are emerging that take advantage of new embedded development platforms that support hardware-software codesign. At Iowa State University, the Department of Electrical and Computer Engineering is developing a new upper-level design course on embedded systems design (CPRE 488) that sits between the introductory course on microcontrollers (CPRE 211) and a graduate course on system-level design (CPRE 588). CPRE 488 pulls together pedagogy from leading textbooks in embedded systems (such as Wolf and also Vahid and Givargis) and puts the concepts into an intensive laboratory incorporating platform FPGA technology. The lab utilizes Xilinx's Virtex II Pro FPGA, which includes a hard-core dedicated processor as well as FPGA fabric, allowing for a complete hardware-software system to be explored entirely within the FPGA.","PeriodicalId":136753,"journal":{"name":"2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129501165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
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