一个完整的MP3解码器在一个芯片

2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) Pub Date : 2005-06-12 DOI:10.1109/MSE.2005.6

H. Hedberg, T. Lenart, Henrik Svensson

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引用次数: 13

摘要

本文介绍了一个课程项目的成果，该项目通过实现一个完整的MP3解码器，重点介绍了ASIC设计流程的各个层次。两个学生团队分别开发了针对ASIC和FPGA的解码器。ASIC解码器由AMI半导体以0.35 /spl mu/m的工艺制造，功耗为40 mW，电源电压为2 V，运行频率为12 MHz。FPGA解码器已在Virtex-II平台上实现并验证。

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A complete MP3 decoder on a chip

The paper presents the results from a course project which focused on all levels in ASIC design flow by implementing a complete MP3 decoder. Two student teams developed a decoder targeting ASIC and FPGA, respectively. The ASIC decoder, fabricated in a 0.35 /spl mu/m process from AMI Semiconductor, consumes 40 mW with a supply voltage of 2 V running at 12 MHz. The FPGA decoder has been implemented and verified on a Virtex-II platform.

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来源期刊

2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)

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