{"title":"An animated interface for X-ray laminographic inspection of fine-pitch interconnect","authors":"S. Black, D. Millard, K. Nilson","doi":"10.1109/IEMT.1991.279778","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279778","url":null,"abstract":"While the function of solder joint inspection is to assess joint quality, evolving fine-pitch mounting technologies have made some electronic assemblies impossible to inspect using human-oriented visual techniques. A group of automated inspection tools has recently been developed in response to this need, one of which uses X-ray laminography in conjunction with very elaborate software. The authors present the work that has been performed to provide an easy-to-use animated graphics-oriented, X-ray laminographic solder joint inspection system interface. The interface has been developed to aid in the study of performance-related interconnect inspection.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129994310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"What does the customer expect from a perfectly designed and manufactured PQFP package?","authors":"A.A. Shinohara","doi":"10.1109/IEMT.1991.279748","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279748","url":null,"abstract":"It is pointed out that customers of semiconductor packaged devices have strongly requested new, advanced SMDs which meet their requirements. Semiconductor manufacturers have made great efforts to develop and manufacture new semiconductor packages. They have endeavored to satisfy even unreasonable demands. The main reasons for the ability of Japanese semiconductor manufacturers to continue as they do now are described. In addition, mismatches of PQFP (plastic quad flat pack) package design between the Electronics Industry Association in Japan and the Joint Electronics Devices Engineering Council are considered. It is noted that the current situation cannot be considered desirable from a standardization point of view.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131100213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Demountable TAB: improving manufacturability of TAB","authors":"B. Afshari, B. Heflinger, F. Matta, R. Pendse","doi":"10.1109/IEMT.1991.279734","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279734","url":null,"abstract":"Area array demountable tape automated bonding (DTAB), a novel demountable, high-performance TAB package, is discussed. Special features of this package, its advantages compared to pin grid arrays (PGA), and its performance characteristics are presented. The basic concept for the package is introduced, and the advantages of this package in the manufacturing of printed circuit assemblies are discussed. Also the design of the package from the design for manufacturability point of view is explained.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134004343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An information model for a CAM database to support flexible manufacture of printed circuit boards","authors":"P. Whelan","doi":"10.1109/IEMT.1991.279783","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279783","url":null,"abstract":"The author presents key features from an information model for a CAM (computer-aided manufacturing) database that supports flexible manufacture of printed circuit boards and other selected components and products. This model incorporates information from several sources: shop orders, CAD (computer-aided design), bill of materials, and process setup. The essential activities of manufacturing can be subdivided into several information categories. These categories include products, processes, factory structure, factory operations, and factory inventory. The information model identifies the entities and data elements that are associated with each of these categories, as well as the relationships among the entities. Appropriate levels of abstraction enable this model to support a wide variety of products and processes. The resulting relational database implementation is integrated with multiple manufacturing software applications to assist with the operation of a manufacturing facility.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114282915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The ES/9000 glass ceramic thermal conduction module, design for manufacturability","authors":"P. Hardin, G. Melvin, M. Nealon","doi":"10.1109/IEMT.1991.279813","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279813","url":null,"abstract":"The highest performing models of IBM's recently announced ES/9000 family of mainframe computers utilize a new high-performance thermal conduction module (TCM). To achieve improved system performance, a newly developed corderite glass ceramic material with an internal copper metallurgy and top surface thin film wiring was used. The new glass ceramic material provides a superior dielectric constant of 5.0, which yields a 27% improvement in propagation delay over IBM's existing 3090 alumina technology. The internal copper metallurgy yields a lower electrical resistance than the molybdenum metallurgy which was used with the alumina ceramic, notwithstanding a 40% reduction in conductor area. To meet the system wireability and chip count criteria, the area of the substrate was increased about 26%, the internal via and wiring pitch was decreased by 10%, and the total number of layers was increased by 66%.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124069194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Practical scheduling and line optimization technology for ASIC manufacturing lines","authors":"C. Hashimoto, T. Takeda, S. Tazawa, T. Sakurai","doi":"10.1109/IEMT.1991.279766","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279766","url":null,"abstract":"For application-specific integrated circuit (ASIC) manufacturing lines, quick product turnaround time as well as high throughput is critical. To achieve both, efficient lot management and line operation are required. An automatic scheduler and its application methods have been developed for this purpose. With this technology, highly effective operation of an ASIC manufacturing line has been accomplished by optimizing both daily scheduling and line management.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122733914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design for in-circuit testability","authors":"S. Reeser","doi":"10.1109/IEMT.1991.279806","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279806","url":null,"abstract":"The author discusses all of the test requirements and design parameters which must be identified in order to ensure that the proper physical characteristics of a printed circuit board (PCB) design allow for complete test coverage at the in-circuit test level. Several strategies for providing the proper physical layout are presented. Additional strategies for maintaining the usage of existing design fixtures after engineering design changes are also presented. It is noted that the present work serves as a guide toward the development of a complete PCB design for in-circuit testability strategy.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124835867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multi-chip-module substrate decreasing signal delay and improving thermal conductivity","authors":"T. Kuramochi, H. Kiyokawa, T. Ono, K. Miyasaka","doi":"10.1109/IEMT.1991.279790","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279790","url":null,"abstract":"An MCM (multi-chip-module) substrate which has less parasitic capacitance and less thermal stress displacement than the conventional type of substrate has been developed. A low- epsilon fluorocarbon resin for interlayer insulator underneath the multi-wiring layers in the substrate on which LSI chips should be mounted was used. The remaining portion of the substrate was filled with insulating material which has high thermal conductivity and low expansion coefficient, e.g., polyimide resin or silicone resin mixed with boron nitride, alumina, silicon carbide, and/or silica. As a result, one could improve the signal delay and characteristic impedance by 30 approximately 40%, decrease the thermal stress displacement 0.22 approximately 0.39 times, and improve the thermal conductivity 1.5 approximately 1.8 times, compared with existing technology using polyimide only.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123309954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An experimental study of the variation of wettability of SMDs using the micro-globule wetting method","authors":"P. Sargent, A.C.T. Tang, F. Gordon","doi":"10.1109/IEMT.1991.279770","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279770","url":null,"abstract":"Surface mount devices (SMDs) from 10 different sources have been tested using the globule/balance or micro-wetting method; they included both chip capacitors and resistors. Wettability indices measured include incubation time, eventual force normalized by theoretical maximum force, the wetting rate and Schouten's figure of merit. These indices enable a comparison of both the wettability and the variation in the wettability between suppliers. The variability is an important criterion not previously investigated. Variability in wetting is directly responsible for significant classes of solder defects because it cannot be factored out by tuning the process parameters during reflow. A more soundly based measure of wettability, the wet rate, shows discrimination between different batches similar to that of other indices. It is related to, but distinct from, the speed at which solder moves up the component metallization at quasi-steady state after wetting has begun but before end-effects associated with the geometrical extent of the metallization are reached. Schouten's index is shown to be misleading. The effects of metallization geometry on the maximum equilibrium force are discussed in the light of experimental results.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125315744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Survey of various statistical process control methods","authors":"S. Kumar","doi":"10.1109/IEMT.1991.279821","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279821","url":null,"abstract":"The author discusses the various statistical process control (SPC) techniques currently being used by different industries. He also introduces a few nonconventional SPC charts which were published recently and could be used for better results. He also describes the Motorola method of performing characterization of processes.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"28 24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126194451","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}