S. Sasaki, H. An, Y. Mori, T. Kataoka, K. Endo, H. Inoue, K. Yamauchi, S. Mizuhara
{"title":"Evaluation of particles on a Si wafer before and after cleaning using a new laser particle counter","authors":"S. Sasaki, H. An, Y. Mori, T. Kataoka, K. Endo, H. Inoue, K. Yamauchi, S. Mizuhara","doi":"10.1109/ISSM.2000.993677","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993677","url":null,"abstract":"A new method has been developed to measure particle sizes of nanometer (nm) order on raw Si wafers by using a light-scattering method. Heretofore, we proposed a new measuring method that can theoretically detect a particle diameter of about 6 nm for particles on a raw Si wafer. A new apparatus measuring particle sizes was constructed according to the developed method. Then, it was verified that this measuring system could measure the particle size with a detection sensitivity of about 24nm. Particle detection on the surface of raw Si wafers was carried out with this measuring system; therefore it could detect a signal corresponding to a particle diameter of about 24/spl sim/34 nm. Moreover washing of the Si wafer by the wet cleaning method was attempted to verify the measured signal as a particle. Consequently, it was verified that detected particles on the raw Si wafer are almost particles adhering on the Si wafer. Then it could be verified that the wet cleaning method is an effective method to remove particles of less than 0.1 /spl mu/m diameter on a Si wafer surface.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124157171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Block cross processing: an innovative approach to constraint management","authors":"S. DeBoo","doi":"10.1109/ISSM.2000.993654","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993654","url":null,"abstract":"Block cross processing (BXP) is an innovative system developed to provide manufacturing operations with a means for managing constrained areas of a process line using intra-site or inter-site material movement. This system is a proactive process that improves flexibility and increases capacity. The BXP system can be applied to any factories running a common process; it segments the fab process into several \"blocks\" that are identified as \"technically safe\" with respect to queue times, integrated yield issues, equipment and/or recipe matching, and capacity concerns. Blocks are a group of operation steps that range in size from 1 to about 10 operation steps depending on the technology and capacity issues within the block. Lots exercising BXP are processed through an entire block on a single manufacturing floor. BXP significantly reduced the amount of transferring between the two New Mexico 6\" fab floors. In addition BXP data was used as a diagnostic tool for improving yield by identifying and closing unmatched \"gaps\" between different factories at a block level. This paper depicts the process used to develop and qualify BXP. It records key learning within the process and notes suggestions for possible improvements.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125444840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Yamamoto, P. Spaull, K. Nishimura, K. Hasebe, T. Asano, K. Nakao, M. Kiyotoshi, K. Eguchi, T. Arikado, K. Okumura
{"title":"In-situ gas cleaning technology of hot-wall batch-type reactor for (Ba,Sr)TiO/sub 3/","authors":"H. Yamamoto, P. Spaull, K. Nishimura, K. Hasebe, T. Asano, K. Nakao, M. Kiyotoshi, K. Eguchi, T. Arikado, K. Okumura","doi":"10.1109/ISSM.2000.993629","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993629","url":null,"abstract":"We present a novel approach to gas cleaning technology for Ba/sub x/Sr/sub (1-x)/TiO/sub 2/ (BST) residual coating in hot wall CVD reactors. It consists of two step continuous process. In the first step we use Cl/sub 2/ gas at 800 deg. C to remove Ba and Sr which have low vapor pressure. Second step consists of using ClF/sub 3/ gas to remove Ti at relatively low temperature. Vapor pressures of the chlorine compounds of Ba and Sr are considerably higher than those of their other existing compounds, thus by chlorination, Ba and Sr turn volatile and are easily etched off.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117141201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Suzuki, H. Hanaoka, Y. Ohkubo, Y. Yamazaki, Y. Shirai, T. Ohmi
{"title":"Energy saving in semiconductor fabs by out-air handling unit performance improvement","authors":"H. Suzuki, H. Hanaoka, Y. Ohkubo, Y. Yamazaki, Y. Shirai, T. Ohmi","doi":"10.1109/ISSM.2000.993671","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993671","url":null,"abstract":"We shows methods of energy saving. The energy consumed in semiconductor fabs is classified into two categories, the manufacturing system and the air conditioning. The energy for the air conditioning is further classified into fresh air intake, recirculation (clean room) air conditioning and cooling system of the manufacturing system. The moisture in the fresh air is condensed on a heat exchange-fin of the air-handling unit (AHU). This condensation decreases thermal exchange and increases intake-air resistance and removal of it improves the performance. So we removed it, and 24% improvement of coefficient of heat exchange is achieved. Using this result, a 5% energy saving of the refrigerator is obtained. If the result is applied to all of the heating, ventilation, and air conditioning (HVAC) system, 3% energy saving is obtained.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130727747","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Yih-Yuh Doong, S. Hsieh, Sheng-che Lin, Binson Shen, C. Hsu
{"title":"The short-loop process tuning & yield evaluation by using the addressable failure site test structures (AFS-TS)","authors":"K. Yih-Yuh Doong, S. Hsieh, Sheng-che Lin, Binson Shen, C. Hsu","doi":"10.1109/ISSM.2000.993647","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993647","url":null,"abstract":"This work describes the implementation of a novel test structure called addressable failure site test structure (AFS-TS) for via process optimization including the liner layer and W-CVD filling process. It manifests the design, defect detection and yield analysis of addressable failure site test structures. The novel test structures are used to discriminate the yield loss issues based on the high spatial defect detection resolution within 2000/spl times/2200 /spl mu/m/sup 2/ of interconnect test structures. A test chip of 4.0/spl times/6.6 mm/sup 2/ containing nine types of test structures was implemented using 0.25 /spl mu/m logic backend of line process. This simple and efficient killer defect identification of process steps is employed as yield enhancement strategy.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123112238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An effective SPC approach to monitoring semiconductor manufacturing processes with multiple variation sources","authors":"A. Chen, R. Guo, P.-J. Yeh","doi":"10.1109/ISSM.2000.993710","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993710","url":null,"abstract":"In this research, we develop an integrated sampling and statistical process control (SPC) strategy for semiconductor processes with multiple variation sources. We first construct a process model to characterize the complex nature of semiconductor processes. Three types of variations: among-site, among-zone and among-batch variations, are considered in the model. Based on this process model and rational sub-grouping techniques, multivariate. T/sup 2/ control charts are then proposed to monitor the process variations. It is shown that the proposed control charts are more effective than conventional charting techniques in detecting various types of process excursions.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"130 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123130581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Environmental management activities by NEC electron devices","authors":"T. Nozaki","doi":"10.1109/ISSM.2000.993633","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993633","url":null,"abstract":"This paper describes the environmental activities being carried out by the Electron Devices group of NEC. Environmental problems have become a global concern rather than a regional concern, and have also become a management concern in the present day society. We report here an example of industry-leading efforts of pursuing waste material reduction, green product promotion activity, as well as environmental accounting, and discuss the importance of environmental management for the 21st century which is being called the \"Environment Century\".","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114599396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Evolution and demands of SoC in ITS and mobile communication systems","authors":"R. Kohno","doi":"10.1109/ISSM.2000.993605","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993605","url":null,"abstract":"As a center of mobile multimedia of the 21st century, we are very much looking forward to the explosion of RandD and business of the next generation of mobile communication systems and the ITS (intelligent transport systems) because ITS will enable information oriented in the field of the road, traffic and vehicles, by using the most advanced technologies of mobile communications and devices, for various purposes such as decrease of traffic accidents, reduction of traffic jams, increase in efficiency of logistics and harmony with the Earth's environment This paper first briefly introduces evolution of mobile communications and ITS in ministries, industries and academia in Japan. Then core communication technologies for ITS are overviewed, such as spread spectrum CDMA, adaptive antenna array, and software radio or software defined radio. The demands on SoC (system on a chip) to carry out the core technologies are addressed.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126396653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High reliability interconnect technology with tungsten-barrier metal in next generation","authors":"R. Shohji","doi":"10.1109/ISSM.2000.993640","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993640","url":null,"abstract":"The purpose of this paper is to reveal the mechanism of discoloration which leads to a via open problem and to demonstrate the effect of W-barrier metal on W-stud process to prevent this problem. In this paper we describe some experiments aimed at solving the discoloration of CVD-W film. These experiments revealed the mechanism whereby this problem leads to degradation of the reliability of W-stud vias because of high via resistance. It is confirmed that using sputtered tungsten film as a barrier metal is very effective in preventing not only WF/sub 6/ attack in CVD-W process but also discoloration due to residual polymer generated in the via etching process. It seems that, in future generations of semiconductors, using sputtered tungsten film as a barrier metal will be effective in preventing high via resistance, which leads to the reliability problem of the W-stud via.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126713872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S.S.P. Rao, J. Stefani, S. Comstock, J. Larsen, B. Paquette, M. Wang
{"title":"Run-to-run process control of oxide CMP using integrated metrology","authors":"S.S.P. Rao, J. Stefani, S. Comstock, J. Larsen, B. Paquette, M. Wang","doi":"10.1109/ISSM.2000.993700","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993700","url":null,"abstract":"Process control of dielectric CMP has become more stringent as device dimensions decrease. This study reports on the improvement in process control that was obtained by using an integrated metrology tool, and automated, factory-level, process control algorithms. The control methodology was proven to be capable of handling multiple pattern levels, with different pattern densities, on multiple polishers in an advanced-prototype/development fab. The improvement in control and throughput with respect to offline metrology and manual control is presented.. Residual sources of variation are analyzed, and schema for further improvements in control capability are presented, based on tests conducted.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129849210","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}