2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)最新文献_第10页

A fully integrated circuit for MEMS vibrating gyroscope using standard 0.25um CMOS process 采用标准0.25um CMOS工艺的MEMS振动陀螺仪的完全集成电路

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117258

Sheng-Ren Chiu, Chung-Yang Sue, Lu-Pu Liao, Li-Tao Teng, Y. Hsu, Y. Su

引用次数: 9

Determination of silicon die initial crack using acoustic emission technique 声发射技术测定硅模初裂

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117283

Pei-Chi Chen, Yen-Fu Su, Shin-Yueh Yang, K. Chiang

{"title":"Determination of silicon die initial crack using acoustic emission technique","authors":"Pei-Chi Chen, Yen-Fu Su, Shin-Yueh Yang, K. Chiang","doi":"10.1109/IMPACT.2011.6117283","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117283","url":null,"abstract":"Three-dimensional chip stacking packaging has become increasingly popular in the electronic packaging industry because of the present market demand on high performance, high capacity and small form factor products. As a result, silicon wafers have to be ground through wafer-thinning processes to achieve greater packaging density. However, induction of cracks on the chips during stacking process or with the use of a device is possible. Therefore, the current research aims to determine the maximum allowable force on a (1 0 0) silicon die using ball-breaker test with an acoustic emission (AE) system. To compare with the experiment data, the finite element analysis was employed using commercial software ANSYS/LS-DYNA3D® to determine the silicon die strength. The results show that the maximum allowable force for a 30 mm × 30 mm × 0.2 mm (1 0 0) silicon is 14.42 N. The value was introduced to simulation to determine the strength of silicon die. The strength of silicon die is 618 MPa, which is lower than that obtained from a previous research that conducted the ball-breaker test without an AE system, the allowable strength is defined as when silicon is fully cracked. The advantage of the method developed in this research is the AE system could detect the failure instantly and obtain the event of initial cracking. The modified ball-breaker test could avoid an overestimation in determining the die strength.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"66 1","pages":"83-86"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90363368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

A introduction of sFCCSP — Fine pitch low profile FCCSP solution 介绍sFCCSP -小间距低轮廓FCCSP解决方案

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117241

E. So, Albert Lan, C. Hsiao, Daniel Yu, Nistec Chang, F. Kao

{"title":"A introduction of sFCCSP — Fine pitch low profile FCCSP solution","authors":"E. So, Albert Lan, C. Hsiao, Daniel Yu, Nistec Chang, F. Kao","doi":"10.1109/IMPACT.2011.6117241","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117241","url":null,"abstract":"As for mainstream portable application (Mobile Phone, Tablet, Handset Gamer), the higher density (array IO pitch <= 100um), higher thermal performance (better theta JA than overmold FCCSP) and lower profile (compare with overmold FCCSP) is necessary for package developing. As to satisfy the marketing needs, some suitable solution can be considered: Utilize Cu Pillar Bump to satisfy the fine pitch request; and also with the exposed die FCCSP to cover the lower profile & better thermal performance. As to come out an easy way to recognize the package type of this combination, the package type of “sFCCSP” (SPIL proposed FCCSP-Exposed Die Cu Pillar FCCSP) had be called for further discussion. In general, Cu Pillar was the fine pitch solution of FCCSP (<130um bump pitch), as the next generation of low IO(<200) application flip chip solution, Cu Pillar can provide a feasibility for better electrical performance but reasonable cost (design-in is necessary), and upcoming challenge is the ELK protection for 40nm / 28nm even finer IC technology. As regard the exposed die FC solution, it is obvious to realize the benefit of skipping overmold 60∼80um thickness for package total height reduction. Of course, the trade-off is either back side surface bleeding or package warpage. In this report, there is a test vehicle to show how we overcome the potential ELK crack & Die bleeding & package warpage issue to approach the mainstream technology for portable market.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"44 1","pages":"126-128"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90391613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Estimation of thermal constriction resistance for simple thermal network analysis of electronic components 电子元件简单热网分析中热收缩阻力的估计

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117171

T. Tomimura, M. Ishizuka

引用次数: 0

Vapor chamber in high-end VGA card 高端VGA卡蒸汽室

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117204

Jung-Chang Wang, Wei-Jui Chen

{"title":"Vapor chamber in high-end VGA card","authors":"Jung-Chang Wang, Wei-Jui Chen","doi":"10.1109/IMPACT.2011.6117204","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117204","url":null,"abstract":"The vapor chamber has been verified the excellent heat transfer efficiency and heat spreading performance utilized particularly in many high-power and small area heat sources. This paper analyzes and compares the thermal performance of a vapor chamber-based thermal module with a traditional Cu metal based plate embedded three heat pipes of 6 mm diameter at high heat flux GPU above 165 Watt. They are estimated and simulated the optimum fin design of aluminum heat sink through computational numerical method and thermal resistance analysis at constant P-Q performance curve of a same commercial blower. These results show that the total thermal resistance value of vapor chamber-based thermal module are under 0.273 °C/W from simulation analytical data and that of heat-pipes and copper based plate thermal module are all over 0.273 °C/W. Therefore, the thermal performance of vapor chamber-based thermal module can be accurately simulated and analyzed by applying the method introduced in this paper. The vapor chamber-based thermal module can achieve the optimum thermal performance and the critical heat flux may exceed 100 Watt/cm2. Consequently, the vapor chamber-based thermal module introduced in this paper is able to cope with future GPU named RV 970 and GTX 590 with high heat flux of more than 60 Watt/cm2.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"105 1","pages":"393-396"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86944061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

A vision based low-frequency electro-hydraulic fatigue testing machine 基于视觉的低频电液疲劳试验机

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117273

Ray-Hwa Wong, Mingfang Li, Ying T. Wang

引用次数: 1

Thermo-mechanical stress analysis and optimization for 28nm extreme low-k large die fcBGA 28nm极低k大晶片fcBGA热机械应力分析与优化

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117217

M. Hsieh, Chien-Chen Lee, Li Chiun Hung, V. Wang, Harry Perng

{"title":"Thermo-mechanical stress analysis and optimization for 28nm extreme low-k large die fcBGA","authors":"M. Hsieh, Chien-Chen Lee, Li Chiun Hung, V. Wang, Harry Perng","doi":"10.1109/IMPACT.2011.6117217","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117217","url":null,"abstract":"The pre-solder crack phenomenon after thermal cycling test is observed in 28nm extreme low-k (ELK) large die fcBGA (flip chip ball grid array), which may come from the resulted critical stresses in IMC (intermetallic compounds) on Cu pad layer. For the purpose of realizing the thermal-mechanical stress distributions in 28nm ELK large die fcBGA, a comprehensive study for the effects of package geometry is investigated by using three-dimensional finite element analyses (FEA) in this paper. The effects of under bump metallurgy (UBM) size, solder resistant opening (SRO) size, solder bump dimension, thermal interface material (TIM) thickness, Cu pad diameter, substrate thickness and its coefficient of thermal expansion (CTE) are discussed by Taguchi L16(27) methodology to figure out the most significant factors. Through the statistical results, it is found that the factors of UBM size, SRO size and Cu pad diameter had significant contributions to stress responses. The most important parameters of UBM and SRO size ratio (UBM/SRO) as well as Cu pad diameter and SRO size ratio (pad/SRO) that comprehend the corresponding stress responses are captured by using response surface methodology (RSM). To have further discussions of these significant factors, dissections for UBM, SRO and polyimide (PI) opening size are also illustrated. The simulated results can be good references and effectively served as design guidelines to avoid the critical stresses as well as enhance the reliability in 28nm ELK large die fcBGA.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"108 1","pages":"411-414"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80719671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

High power electronics package: From modeling to implementation 大功率电子封装:从建模到实现

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117183

C. Yuan, R. Kregting, H. Ye, W. V. van Driel, S. Gielen, G. Zhang

引用次数: 1

Thermal characterization of a wide I/O 3DIC 宽I/O 3DIC的热特性

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117256

Kuo-ying Tsai, Shih-chang Ku, W. Chang, H. Tsai

引用次数: 3

High-speed electrical design study for 3D-IC packaging technology 3D-IC封装技术的高速电气设计研究

2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) Pub Date : 2011-12-29 DOI: 10.1109/IMPACT.2011.6117223

R. Sung, K. Chiang, D. Lee, M. Ma

引用次数: 2