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Interpolating algorithm optimization and FPGA implementation in image scaling engine 图像缩放引擎内插算法优化及FPGA实现
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4606980
F. Ran, Jing Liu, Meihua Xu
{"title":"Interpolating algorithm optimization and FPGA implementation in image scaling engine","authors":"F. Ran, Jing Liu, Meihua Xu","doi":"10.1109/ICEPT.2008.4606980","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4606980","url":null,"abstract":"Bi-cubic interpolation algorithm is commonly used in image scaling, but traditional cubic interpolation has its own shortcomings such as complicated computation, long computational time and so on. For these problems, the paper studies traditional cubic kernel function and proposes an optimized algorithm with adjustable coefficients. This algorithm utilizes an modifying coefficient lambda to amend the coefficients in the kernel function, which helps the scaling system choose best algorithm with different images. Then, the superiority is verified by MATLAB simulation and the optimized algorithm is applied to the image scaling engine called scaler through the verification in FPGA.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"11 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85923370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Analysis and solving of the EMI effect on LC-VCO in mixed-signal ICs 混合信号集成电路中LC-VCO电磁干扰的分析与解决
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4607149
Wenrong Yang, Jiongming Wang, Jue Zhang, Xiaohui Li
{"title":"Analysis and solving of the EMI effect on LC-VCO in mixed-signal ICs","authors":"Wenrong Yang, Jiongming Wang, Jue Zhang, Xiaohui Li","doi":"10.1109/ICEPT.2008.4607149","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4607149","url":null,"abstract":"The EMI/EMC problems appear in mixed-signal ICs with the increasing frequency and decreasing process geometries. In this paper, the amplitude modulation (AM) is taken into account the LC-VCO based on the TSMC 0.25 um mixed-signal process, and a cascade amplifier circuit, which is not complex, is proposed to optimize the LC-VCO through analyzing the noise coupling transition function of the LC-VCO. Lastly, the efficiency and usefulness of the proposed method is proved in the simulations.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"49 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86082045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Manufacture, microstructure and microhardness analysis of Sn-Bi lead-free solder reinforced with Sn-Ag-Cu nano-particles 纳米Sn-Ag-Cu增强Sn-Bi无铅焊料的制备、显微组织和显微硬度分析
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4607057
Lili Zhang, W. Tao, J. Liu, Yan Zhang, Z. Cheng, C. Andersson, Yulai Gao, Q. Zhai
{"title":"Manufacture, microstructure and microhardness analysis of Sn-Bi lead-free solder reinforced with Sn-Ag-Cu nano-particles","authors":"Lili Zhang, W. Tao, J. Liu, Yan Zhang, Z. Cheng, C. Andersson, Yulai Gao, Q. Zhai","doi":"10.1109/ICEPT.2008.4607057","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4607057","url":null,"abstract":"This paper investigates a composite solders obtained by adding Sn-3.0Ag-0.5Cu (SAC) nano-particles into conventional eutectic Sn-58Bi solder paste. The microstructure analysis and the measurement of the Vickers microhardness have been carried out. Utilizing the self-developed consumable-electrode direct current arc (CDCA) technique, the Sn-3.0Ag-0.5Cu nano-particles with an average particle size between 20 and 80 nm are prepared. The reinforced lead-free Sn-Bi solder was prepared by thoroughly blending the nanometer-sized SAC particles into the eutectic Sn-Bi solder paste. The SAC reinforced Sn-Bi composite solder paste was printed onto ENIG/Cu metalized substrate and reflowed in a conventional reflow oven. After reflow, the morphology of the as-solidified reinforced composite solder was observed by means of SEM and TEM. The Vickers microhardness measurements indicated that the addition of SAC nano-particles enhances the overall strength of the eutectic solder, and the results agree well with the theory of dispersion strengthening.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"86 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85382578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Optimization of CAVLC algorithm and its FPGA implementation CAVLC算法的优化及其FPGA实现
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4606965
Xu Meihua, Li Ke, Xuan Xiang-guang, Fan Yule
{"title":"Optimization of CAVLC algorithm and its FPGA implementation","authors":"Xu Meihua, Li Ke, Xuan Xiang-guang, Fan Yule","doi":"10.1109/ICEPT.2008.4606965","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4606965","url":null,"abstract":"As a new generation of video frequency coding standard, H.264/AVC is excellent in compression performance, while its complexity is much higher than common encoder. Based on the detailed analysis of CAVLC algorithm, this paper first points out the ldquobottleneckrdquo of CAVLC encoder implementation, then presents the optimization scheme for the major modules of CAVLC encoder, which includes VLC table prediction with multiple reference blocks, fast look-up table matching, and arithmetic eliminating method etc. It is successfully synthesized and simulated with EDA tools and implemented in FPGA of Cyclone II EP2C20F484, and the speed of the coding module is up to 165 MHz. The experimental results show that the improved design scheme will be helpful to achieve the real-time processing purpose by saving the hardware resource together with the increasing coding rate.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"79 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85530454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Mixed mode interface characterization considering thermal residual stress 考虑热残余应力的混合模界面表征
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4607131
A. Xiao, G. Schlottig, H. Pape, B. Wunderle, K. Jansen, L. Ernst
{"title":"Mixed mode interface characterization considering thermal residual stress","authors":"A. Xiao, G. Schlottig, H. Pape, B. Wunderle, K. Jansen, L. Ernst","doi":"10.1109/ICEPT.2008.4607131","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4607131","url":null,"abstract":"Interfacial delamination has become one of the key reliability issues in the microelectronic industry and therefore is getting more and more attention. The analysis of delamination of a laminate structure with a crack along the interface is central to the characterization of interfacial toughness. Due to the mismatch in mechanical properties of the materials adjacent to the interface and also possible asymmetry of loading and geometry, usually the crack propagates under mixed mode conditions. The present study deals with delamination toughness measurements of an epoxy molding compound - copper lead frame interface as directly obtained from a real production process. As a consequence the specimen dimensions are relatively small and therefore a dedicated small-size test set-up was designed and fabricated. The test setup allows transferring two separated loadings (mode I and mode II) on a single specimen. The setup is flexible and adjustable for measuring specimens with various dimensions. For measurements under various temperatures and moisture conditions, a special climate chamber is designed. The ldquocurrent crack lengthrdquo is required for the interpretation of measurement results through FEM-fracture mechanics simulations. Therefore, during testing the ldquocurrent crack lengthrdquo is captured using a CCD camera and a micro deformation analysis system (MicroDac). The critical fracture properties are obtained by interpreting the experimental results through dedicated finite element modeling.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"54 1","pages":"1-7"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91297969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Effects of Bi and Ni addition on wettability and melting point of Sn-0.3Ag-0.7Cu Low-Ag Pb-free solder Bi和Ni添加量对Sn-0.3Ag-0.7Cu低银无铅焊料润湿性和熔点的影响
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4607065
Y. Liu, F. Sun, T.L. Yan, W.G. Hu
{"title":"Effects of Bi and Ni addition on wettability and melting point of Sn-0.3Ag-0.7Cu Low-Ag Pb-free solder","authors":"Y. Liu, F. Sun, T.L. Yan, W.G. Hu","doi":"10.1109/ICEPT.2008.4607065","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4607065","url":null,"abstract":"Bi and Ni were added to Sn-0.3Ag-0.7Cu low-Ag solder, to fabricate new low-Ag solders, Sn-0.3Ag-0.7Cu-XBi (X= 1.0, 3.0, 4.5) and Sn-0.3Ag-0.7Cu-XNi (X=0.05, 0.10, 0.15). Melting point tests were carried out with DSC (differential scanning calorimetry) instrument. Wettability tests were conducted on a wetting balance instrument. Test results of the two new solders were compared with that of Sn-0.3Ag-0.7Cu respectively to study the effects of the adding elements on the melting point and wettability of the low-Ag Pb-free solder. It shows that Bi addition has striking positive effects on decreasing the melting point and improving wettability. Ni addition could improve the wettability as well, although not as much as Bi does. And Ni has a negative effect on melting point. With proper adding amount as X=3.0, Bi could significantly improve the wettability and decrease melting point at the same time. However, too much Bi addition could increase the melting range between liquidus and solidus, which may lead to the initiation of solidification crack of the solder joints.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"1 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89043495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Titania nanostructures fabricated through anodization of Ti6Al4V alloy Ti6Al4V合金阳极氧化制备二氧化钛纳米结构
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4607049
Yan Li, D. Ding, S. Bai, Ming Li, D. Mao
{"title":"Titania nanostructures fabricated through anodization of Ti6Al4V alloy","authors":"Yan Li, D. Ding, S. Bai, Ming Li, D. Mao","doi":"10.1109/ICEPT.2008.4607049","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4607049","url":null,"abstract":"This work reports on the fabrication and thermal stability of self-organized titania nanostructures on Ti6Al4V alloy. Ti6Al4V sheets were anodized in 1 M NaH2PO4 containing 0.5 wt% HF. And the anodized sheets were heat-treated at different temperatures to test their thermal stability. SEM observations revealed that, for the two-phase Ti6Al4V alloy, there were two different kinds of nanostructures (nanotubes grown at alpha-phase region and inhomogeneous nanopores grown at beta-phase region) formed on the substrate surface. The nanotubes can withstand a high temperature of 650degC without collapsing but sinter to densification at 675-700degC.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"210 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89103696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Flip-chip on board packaging of a thermal wind sensor 热风传感器的板上倒装芯片封装
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4606948
G. Shen, M. Qin, Qing‐An Huang, Hua Zhang, Jian Wu
{"title":"Flip-chip on board packaging of a thermal wind sensor","authors":"G. Shen, M. Qin, Qing‐An Huang, Hua Zhang, Jian Wu","doi":"10.1109/ICEPT.2008.4606948","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4606948","url":null,"abstract":"A two dimensional wind sensor was designed, fabricated and packaged on ceramic substrate instead of silicon substrate. The Ti/Pt heater and thermistors were fabricated using single lift-off process. The gold bumps were then sputtered and patterned on the chip using lift-off process again. Correspondingly, the Pb/Sn bumps were fabricated on the FR4 substrate using stencil printing method after metallization. The sensor chip was flip-chip packaged on the FR4 substrate, and the gap was filled with epoxy-based underfill to improve the structure strength and thermal isolation. The wind velocity and direction offsets of the sensor were analyzed and compensated using software and hardware calibration. The packaged sensor was tested in wind tunnel in constant power mode. Both the simulation and test results show that the thermal wind sensor can measure wind speeds up to 10 m/s with an accuracy of 0.5 m/s, and wind direction in a full range of 360deg with a resolution within 5deg.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"34 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88454826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A dual-band MEMS PA study for mobile communication systems 移动通信系统的双频MEMS PA研究
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4607027
Ji-de Zhao, Yingliang Li, De-fang Wei
{"title":"A dual-band MEMS PA study for mobile communication systems","authors":"Ji-de Zhao, Yingliang Li, De-fang Wei","doi":"10.1109/ICEPT.2008.4607027","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4607027","url":null,"abstract":"This paper described a dual-band PA with MEMS capacity switch, and it is composed of the series MEMS capacity switch, cascode amplifier and other circuit, and gets the dual-band of 2.1 GHz /2.3 GHz PA by the switch capacity variation. The first, a MEMS capacity switch is designed, analyzed by EDA of HFSS, and obtain the capacitive curve with 2.1 GHz and 2.3 GHz, insert loss is about 2 dB and isolation is about 50 dB. The second, the MEMS switch is applied in the PA circuit, and the circuit model is designed basing on the CMOS technology. The performance is obtained by EDA of ADS simulation, and the gain is 12.4 dB and 11.5 dB with 2.1 GHz and 2.3 GHz and PAE is about 50% when output 25 dBm at two band. MEMS switches are used to implement a variable filter and matching network that allows the PA to realize the dual-band and high efficiency. It has good performance, and it may be applied for mobile communications systems, such as 3.5 G (generation), 4 G mobile communications systems.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"75 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90436033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A study on application of N&K Analyzer in OLED failure analysis N&K分析仪在OLED失效分析中的应用研究
2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI: 10.1109/ICEPT.2008.4607152
Q. Fang, Yafang Peng, H. Yu
{"title":"A study on application of N&K Analyzer in OLED failure analysis","authors":"Q. Fang, Yafang Peng, H. Yu","doi":"10.1109/ICEPT.2008.4607152","DOIUrl":"https://doi.org/10.1109/ICEPT.2008.4607152","url":null,"abstract":"The thickness of each layer of the OLED (Organic Light Emitting Diode) with the multi-layer structure of ITO/NPB/Alq3/LiF/Al was studied by N&K Analyzer before and after aging experiments. Through comparing the film thickness when kept in ambient atmosphere with different exposure duration and failed samples, main thickness changes occur in the Alq3 and LiF layers while the ITO and NPB layer had no dramatic changes in thickness. The trend is Alq3 layer decrease and LiF layer increase in the process of failure. Before electrical failure, the devices exhibit good uniformity in film thickness; but when electrical failure occurs, this uniformity has obviously been destroyed. So it is proved that N&K Analyzer is an effective new method for OLED failure analysis especially in the condition that it is very difficult to characterize the OLEDpsilas multi-ultra thin-layer structure by traditional means.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"38 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79658296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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