Mehmet Akpamukcu , Abdullah Ates , Ibrahim Isik , Esme Isik
{"title":"Optimization of distribution function and model parameters for molecular communication via diffusion with OtoO approximation","authors":"Mehmet Akpamukcu , Abdullah Ates , Ibrahim Isik , Esme Isik","doi":"10.1016/j.nancom.2024.100532","DOIUrl":"10.1016/j.nancom.2024.100532","url":null,"abstract":"<div><p>The analysis is generally conducted in stationary receiver and transmitter models in a diffusion environment for the fundamental Molecular communication (MOC) models. However, a mobile MOC model is employed in this study, deviating from the existing literature. This mobile MOC model considers the mobility of all variables in the diffusion environment, including the transmitter, receiver, and molecules. Firstly, a novel MOC model is proposed, departing from the conventional normal distribution for the mobility of variables. Instead, alternative distribution functions such as the Pareto distribution, extreme value distribution, <em>t</em>-distribution, and generalized extreme value distribution are employed. Furthermore, the system's performance is enhanced by optimizing the distribution function and model parameters, such as the diffusion coefficient, using the optimization of optimization (OtoO) approach. In this approach, the Multi-Verse Optimization (MVO) algorithm serves as the primary algorithm, while the Grey Wolf Optimization (GWO) algorithm functions as the auxiliary algorithm. Essentially, the MVO algorithm optimizes the parameters of the MOC model, while simultaneously, the GWO algorithm optimizes the impact of the optimization processes of MVO on the parameters ``p'' and ``N'' as well as the constant parameter of the distribution function. By optimizing both the parameters of the MOC model and the distribution function, the number of received molecules is significantly increased. Therefore, this study not only improves the results of the MOC model structure based on different distribution functions but also optimizes all parameters of the proposed model using the MVO-GWO OtoO approach.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"42 ","pages":"Article 100532"},"PeriodicalIF":2.9,"publicationDate":"2024-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142095336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An ultra broadband metamaterial absorber based on metal-dielectric-metal technology for THz spectrum","authors":"Sachin Sharma , Fatemeh Kazemi , Pankaj Singh , Anup Kumar , Ferdows B. Zarrabi","doi":"10.1016/j.nancom.2024.100531","DOIUrl":"10.1016/j.nancom.2024.100531","url":null,"abstract":"<div><p>This paper introduces a novel ultra-broadband Metamaterial Absorber (UBMA) demonstrating significant absorption capabilities across a wide terahertz frequency range from 2.42 THz to 6.11 THz. The 3.7 THz bandwidth represents 87% of the central frequency. The proposed UBMA comprises three layers: a star-shaped metal patch on top, a dielectric substrate in the middle, and a metallic ground plane below. Simulations using CST Microwave Studio software reveal that the design achieves high absorption at five distinct frequencies: 2.47, 3.45, 4.89, 6.01, and 6.87 THz, with absorption rates of 99% for the first four peaks and 90% for the fifth peak. The study of electric field and surface current distribution provides insights into the absorption mechanism. While the UBMA exhibits polarization-independent performance, its angular response shows some sensitivity to the incident angle, especially beyond 30° Despite this, the absorber maintains over 70% absorptivity up to a 45° incidence angle for both TE and TM polarizations within specific frequency ranges. The simple structure combined with high absorption efficiency makes the UBMA suitable for THz imaging, detection, and stealth applications, although its angular sensitivity must be considered for certain applications.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"42 ","pages":"Article 100531"},"PeriodicalIF":2.9,"publicationDate":"2024-08-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142077320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jiayuan Cui , Da Li , Jiabiao Zhao , Jiacheng Liu , Guohao Liu , Xiangkun He , Yue Su , Fei Song , Peian Li , Jianjun Ma
{"title":"Terahertz channel modeling based on surface sensing characteristics","authors":"Jiayuan Cui , Da Li , Jiabiao Zhao , Jiacheng Liu , Guohao Liu , Xiangkun He , Yue Su , Fei Song , Peian Li , Jianjun Ma","doi":"10.1016/j.nancom.2024.100533","DOIUrl":"10.1016/j.nancom.2024.100533","url":null,"abstract":"<div><p>The dielectric properties of environmental surfaces, including walls, floors and the ground, etc., play a crucial role in shaping the accuracy of terahertz (THz) channel modeling, thereby directly impacting the effectiveness of communication systems. Traditionally, acquiring these properties has relied on methods such as terahertz time-domain spectroscopy (THz-TDS) or vector network analyzers (VNA), demanding rigorous sample preparation and entailing a significant expenditure of time. However, such measurements are not always feasible, particularly in novel and uncharacterized scenarios. In this work, we propose a new approach for channel modeling that leverages the inherent sensing capabilities of THz channels, specifically by obtaining channel measurement data through the analysis of refractive indices. By comparing the results obtained through channel sensing with that derived from THz-TDS measurements, we demonstrate the its ability to yield dependable surface property information. Integrating it into a ray-tracing algorithm for channel modeling in both a miniaturized cityscape scenario and an indoor environment, the results show consistency with experimental measurements, thereby validating its effectiveness in real-world settings.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"42 ","pages":"Article 100533"},"PeriodicalIF":2.9,"publicationDate":"2024-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142040587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Systematic exploration of N-bit Vedic multipliers: A roadmap of technological approaches in pursuit of future trends","authors":"Hemanshi Chugh, Sonal Singh","doi":"10.1016/j.nancom.2024.100529","DOIUrl":"10.1016/j.nancom.2024.100529","url":null,"abstract":"<div><p>This review article presents a systematic exploration of N-bit Vedic multipliers, focusing on the technological approaches utilized for their front-end and back-end stage implementations. It highlights the diverse simulation tools employed in both stages to develop efficient multiplication units, including the use of hardware description languages for the front end and schematic design with functional verification for the back end stage. Vedic multipliers are becoming increasingly popular as efficient multiplication units, with the latest advancements employing CMOS and Quantum Dot Cellular Automata (QCA) technologies. However, CMOS technology has several limitations in terms of physical, material, power-thermal, technological, and economic factors, leading to the development of QCA as a promising nanotechnology. The article discusses the paradigm shift from CMOS to QCA technology and its benefits and implications. Additionally, the article provides a systematic classification of the diverse application areas where Vedic multipliers are used. By exploring the potential aspects of Vedic multipliers and delving into the technological shift towards QCA, this review article offers valuable insights into their implementation and highlights the vast range of potential applications they may revolutionize.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"42 ","pages":"Article 100529"},"PeriodicalIF":2.9,"publicationDate":"2024-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141947939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and analysis of a fault tolerance nano-scale code converter based on quantum-dots","authors":"Changgui Xie , Xin Zhao , Nima Jafari Navimipour","doi":"10.1016/j.nancom.2024.100530","DOIUrl":"10.1016/j.nancom.2024.100530","url":null,"abstract":"<div><p>Quantum-dot cellular automata (<em>QCA</em>), a nano-scale computer framework, is developing as a potential alternative to current transistor-based technologies. However, it is susceptible to a variety of fabrication-related errors and process variances because it is a novel technology. As a result, QCA-based circuits pose reliability-related problems since they are prone to faults. To address the dependability challenges, it is becoming increasingly necessary to create fault-tolerance QCA-based circuits. On the other hand, the applications of code converters in digital systems are essential for rapid signal processing. Using fault-tolerance <em>XOR</em> and multiplexer, this research suggests a nano-based binary-to-gray and gray-to-binary code converter circuit in a single layer to increase efficiency and reduce complexity. The fault-tolerance performance of the suggested circuits against cell omission, misalignment, displacement, and extra cell deposition faults has significantly improved. Concerning the generalized design metrics of QCA circuits, the fault-tolerance designs have been contrasted with the existing structures. The proposed fault-tolerance circuits' energy dissipation findings have been calculated using the precise <em>QCADesigner-E</em> power estimator tool. Using the QCADesigner-E program, the proposed circuits' functionality has been confirmed. The results implied the high efficiency and applicability of the proposed designs.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"42 ","pages":"Article 100530"},"PeriodicalIF":2.9,"publicationDate":"2024-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142012110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling and performance evaluation for electromagnetic micro/nano-gateway","authors":"Akram Galal , Xavier Hesselbach","doi":"10.1016/j.nancom.2024.100527","DOIUrl":"10.1016/j.nancom.2024.100527","url":null,"abstract":"<div><p>The Internet of nano-things communication has increased attention in recent years, serving different applications in many fields. Such applications need uplink and downlink communication between the nano-network and the macro-domain world through macro/nano-interfaces, where nano-sensors/actuators communicate with smart hybrid devices called micro/nano-gateways. The analytical evaluation of such gateways is mandatory, as it requires a precise study of their performance in handling traffic in the upstream/downstream directions. In this paper, an analytical evaluation of the micro/nano-gateway performance is studied using queueing theory to describe the behavior of the gateway handling the nano-network upstream traffic. The analytical investigation illustrates how different classes of upstream traffic will be processed by the gateway and distributed over three different queues according to traffic characteristics. The study shows the effect of the number of running servers inside each queue and the buffer size on the overall performance of the micro/nano-gateway.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"41 ","pages":"Article 100527"},"PeriodicalIF":2.9,"publicationDate":"2024-07-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S1878778924000334/pdfft?md5=fa5698b97b62967fefb2f1aeb5bb4282&pid=1-s2.0-S1878778924000334-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141785166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jadav Chandra Das , Bikash Debnath , Debashis De , V. Murali Mohan
{"title":"Dual banyan network (DBN) design: A quantum-dot cellular automata (QCA) based approach","authors":"Jadav Chandra Das , Bikash Debnath , Debashis De , V. Murali Mohan","doi":"10.1016/j.nancom.2024.100528","DOIUrl":"10.1016/j.nancom.2024.100528","url":null,"abstract":"<div><p>The inputs use a non-blocking internal process to distribute the data using address of the port of the receiver using a non-blocking interior multistage transmission architecture known as a dual banyan network (DBN). The DBN is a primary component in many communication and switching applications because it efficiently routes and switches data packets. This study shows how to construct a single-layer DBN using QCA. A single layer 2 × 2 crossbar network (CBN) with two inputs and two outputs is suggested and developed in QCA to create the proposed communication architecture. In this study, a 2 × 2 CBN is used as a preliminary building block to create a 4 × 4 DBN. We present a detailed analysis of the DBN design, including its architecture, functionality, and performance evaluation. For a fault-free crossbar switch design, the consequence of a fault that affects the control line is noticed and surpassed. Similarly, the proposed architectures' fault tolerance has been described by considering fault scenarios at the 2 × 2 CBN control lines. Considering the logic gates, number of clock cycles, and device size complexity of the designs are measured. All of the designs were implemented using QCADesigner software. The power dissipation of the suggested layouts.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"41 ","pages":"Article 100528"},"PeriodicalIF":2.9,"publicationDate":"2024-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141849683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Emmanuel K. Chemweno, Pradeep Kumar, Thomas J.O. Afullo
{"title":"Design and simulation of a metamaterial polarization-rotator wall for isolation improvement in SIW fed MIMO DRA for D-band applications","authors":"Emmanuel K. Chemweno, Pradeep Kumar, Thomas J.O. Afullo","doi":"10.1016/j.nancom.2024.100524","DOIUrl":"10.1016/j.nancom.2024.100524","url":null,"abstract":"<div><p>In this research, a metamaterial polarization-rotator (MTMPR) wall is proposed for mutual coupling reduction in a <span><math><mrow><mn>2</mn><mo>×</mo><mn>2</mn></mrow></math></span> multiple-input multiple-output (MIMO) antenna. A substrate integrated waveguide (SIW) based dielectric resonator antenna (DRA) is the preferred topology for the D-band frequency antenna design. The antenna elements are closely packed to achieve high antenna integration. The effect of the proposed isolation technique on the bandwidth performance and radiation characteristics of the antenna is investigated. Simulation results show that the proposed antenna exhibits a −10 dB impedance bandwidth of 19.5% (136.68 GHz–166.28 GHz), a gain of 11.06 dBi and a high efficiency of 84%. The antenna radiates in the broadside direction, with an isolation performance greater than 21.16 dB across the entire bandwidth of operation. Diversity metrics are also evaluated, indicating low correlation between the antenna elements and suitability of the proposed design for MIMO applications.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"41 ","pages":"Article 100524"},"PeriodicalIF":2.9,"publicationDate":"2024-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S1878778924000309/pdfft?md5=71a3ac5d34b11b1f536c1b46c9465733&pid=1-s2.0-S1878778924000309-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141630427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Deepa Perumal , Aravindhan Alagarsamy , Sundarakannan Mahilmaran , Gian Carlo Cardarilli , Seok-Bum Ko
{"title":"Probability-based mapping approach for an application-aware networks-on-chip architectures","authors":"Deepa Perumal , Aravindhan Alagarsamy , Sundarakannan Mahilmaran , Gian Carlo Cardarilli , Seok-Bum Ko","doi":"10.1016/j.nancom.2024.100526","DOIUrl":"https://doi.org/10.1016/j.nancom.2024.100526","url":null,"abstract":"<div><p>In a digital and automation era, on-chip multi-core architecture plays a vital role in effective communication in the field of very large-scale integrated circuits (VLSI). In this paper, we propose a unique mapping approach in which a probability-based core selection from the application benchmark into the center to eccentric way of placement of cores in the standard network architecture improves the performance of networks-on-chip (NoC). The proposed approach utilizes a structured mapping strategy, in contrast to the random mapping. This characteristic renders the proposed method a robust solution for a diverse range of NoC architectures irrespective of scale. The proposed approach provides better quality of service (QoS) with optimal total communication bandwidth and average hop count. The performance of the proposed mapping approach is validated with various experiments over standard and real-time benchmarks. The investigation results indicate that the total communication cost over real-time NoC benchmarks for the proposed mapping approach offers 43.06%, 22.75%, and 16.69% average improvement over CastNet, NMAP, and mapGtoM respectively. Furthermore, we adopt uniform geometric and shuffled traffic patterns to identify the latency and throughput of the proposed probability-based mapping approach. The investigation results indicate that the proposed mapping approach outperforms existing mapping procedures.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"41 ","pages":"Article 100526"},"PeriodicalIF":2.9,"publicationDate":"2024-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141606025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Quad-functioning Parity Layout for Nanocomputing: A QCA Design","authors":"Angshuman Khan , Ali Newaz Bahar , Rajeev Arya","doi":"10.1016/j.nancom.2024.100525","DOIUrl":"https://doi.org/10.1016/j.nancom.2024.100525","url":null,"abstract":"<div><p>Quantum dot cellular automata (QCA) is considered an alternative to conventional technologies like CMOS (Complementary Metal-Oxide-Semiconductor) technology due to its potential for lower power consumption, higher speed, and increased device density. QCA introduces a novel approach to designing nano communication circuits and systems. Nano communications data mistakes are detected via parity generators and checkers. The parity bit of each data block ensures that the number of 1’s is either even or odd. Consequently, the system requires four circuits: an even parity generator, an odd parity generator, an even parity checker, and an odd parity checker. The whole system requires more space and cell complexity. In this work, we propose a QCA architecture that serves as a generator for both even and odd parities, as well as a checker for both even and odd parities. It is a quad-functioning circuit that performs four distinct operations within a single design, utilizing 118 QCA cells and occupying an area of 0.17 μm<sup>2</sup>. The recommended approach uses an efficient XOR gate, resulting in improvements across several performance metrics. QCAPro calculates energy dissipation and design parameters. The recommended QCA circuit outperformed similar QCA circuits in size, complexity, and energy dissipation. The circuit's design cost functions are also low. There has been a 17% reduction in latency and an 86% improvement in QCA-specific costs when compared to the optimal existing design. Moreover, it necessitates a 40% reduction in majority gate usage. The proposed design may compete effectively with other equivalent higher-order circuit designs by reducing the need for multiple blocks in conventional circuits to execute the same task. This architecture holds potential benefits for nano processors and nano communication networks.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"41 ","pages":"Article 100525"},"PeriodicalIF":2.9,"publicationDate":"2024-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141607760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}