Design of ternary reversible Feynman and Toffoli gates in ternary quantum-dot cellular automata

IF 2.9 4区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Arash Fattahi , Reza Sabbaghi-Nadooshan , Tohid Mossazadeh , Majid Haghparast
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引用次数: 0

Abstract

The use of reversible logic gates leads to a reduction in energy loss in logic circuits by preventing information loss. New computing methods, such as quantum-dot cellular automata (QCA), have been offered by nanotechnology emerging with nanoelectronics to make more comprehensive logic circuits. In nanotechnology-based systems, some bits are erased when the system performs any computation, and this causes heat dissipation and energy loss in systems. Adder circuits are the basis of any arithmetic operation and one of the main parts of many circuits for creating complex hardware; therefore, the use of enhanced adder circuits leads to high performance in logic circuits. In irreversible logic, the energy that is transferred from the power supply to the circuit is converted into heat, and energy loss occurs. Power management plays a vital role in modern computational systems, and using ternary logic instead of previous technologies leads to better performance. The main purpose of our study is to design ternary quantum-dot cellular automata (TQCA) reversible logic gates based on ternary quantum-dot cellular technology. Reversible gates are the basis of creating a reversible circuit. In this paper, the Muthukrishnan-Stroud (M-S) gate, which is the basis of all other reversible ternary gates, is implemented in ternary QCA technology, and then, reversible ternary Feynman and Toffoli (C2NOT) gates are designed. More optimal adder circuits can be realized in three-valued technology using Feynman and Toffoli gates. The area, delay, and cell count of the proposed TQCA designs are compared with those of other related works, and the effect of fault on the designs in the presence of cell omission defect is determined. The occupied areas of the proposed Feynman and Toffoli gate designs are 0.069 μm2 and 0.073 μm2, respectively. Moreover, the fault tolerance levels of these TQCA gates are 77% and 92%, respectively.
在三元量子点蜂窝自动机中设计三元可逆费曼和托福利门
使用可逆逻辑门可以防止信息丢失,从而减少逻辑电路中的能量损耗。纳米技术与纳米电子学的结合提供了新的计算方法,如量子点蜂窝自动机(QCA),以制造更全面的逻辑电路。在基于纳米技术的系统中,当系统执行任何计算时,一些比特会被擦除,这会导致系统散热和能量损失。加法器电路是任何算术运算的基础,也是创建复杂硬件的许多电路的主要部分之一;因此,使用增强型加法器电路可提高逻辑电路的性能。在不可逆逻辑中,从电源传输到电路的能量会转化为热量,从而产生能量损耗。电源管理在现代计算系统中起着至关重要的作用,而使用三元逻辑代替以前的技术可以带来更好的性能。我们研究的主要目的是基于三元量子点蜂窝技术设计三元量子点蜂窝自动机(TQCA)可逆逻辑门。可逆门是创建可逆电路的基础。本文利用三元量子点蜂窝技术实现了作为所有其他可逆三元门基础的 Muthukrishnan-Stroud (M-S) 门,然后设计了可逆三元费曼和托福利 (C2NOT) 门。利用费曼和托福利门可以在三值技术中实现更优化的加法器电路。将所提出的 TQCA 设计的面积、延迟和单元数与其他相关著作的设计进行了比较,并确定了在存在单元遗漏缺陷的情况下,故障对设计的影响。所提出的费曼门和托福利门设计的占用面积分别为 0.069 μm2 和 0.073 μm2。此外,这些 TQCA 栅极的容错水平分别为 77% 和 92%。
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来源期刊
Nano Communication Networks
Nano Communication Networks Mathematics-Applied Mathematics
CiteScore
6.00
自引率
6.90%
发文量
14
期刊介绍: The Nano Communication Networks Journal is an international, archival and multi-disciplinary journal providing a publication vehicle for complete coverage of all topics of interest to those involved in all aspects of nanoscale communication and networking. Theoretical research contributions presenting new techniques, concepts or analyses; applied contributions reporting on experiences and experiments; and tutorial and survey manuscripts are published. Nano Communication Networks is a part of the COMNET (Computer Networks) family of journals within Elsevier. The family of journals covers all aspects of networking except nanonetworking, which is the scope of this journal.
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