{"title":"Bornite Cu5FeS4: Solid-State Synthesis and Thermoelectric Properties","authors":"Hyeon-Sik O, Il-Ho Kim","doi":"10.1007/s13391-026-00656-1","DOIUrl":"10.1007/s13391-026-00656-1","url":null,"abstract":"<div><p>Copper sulfide-based thermoelectric materials composed of earth-abundant and environmentally benign elements have attracted considerable attention for mid-temperature energy conversion. Bornite (Cu<sub>5</sub>FeS<sub>4</sub>), a p-type semiconductor with intrinsically low lattice thermal conductivity, is considered a promising candidate for applications in the 300–700 K temperature range. However, achieving phase-pure bornite with optimized transport properties remains challenging due to its sensitivity to processing conditions and phase stability. In this study, we systematically investigate the effect of hot pressing (HP) temperature on phase evolution, microstructure, and thermoelectric transport properties of bornite synthesized via mechanical alloying (MA). Particular emphasis is placed on understanding the relationship between phase purity, secondary phase suppression, and transport behavior. X-ray diffraction analysis reveals that secondary chalcopyrite (CuFeS<sub>2</sub>) phases form at lower HP temperatures (623–673 K), while a phase-pure bornite is obtained at 723 K, indicating that sufficient thermal energy is required for complete phase homogenization. This phase evolution is found to strongly influence both charge and thermal transport properties. Although the electrical conductivity decreases slightly with increasing HP temperature, the reduction in thermal conductivity and improved phase homogeneity lead to enhanced thermoelectric performance. The sample processed at 723 K exhibits the lowest thermal conductivity (< 0.5 W m⁻¹ K⁻¹) and achieves the highest figure of merit, with a maximum ZT of 0.65 at 723 K. These results demonstrate that precise control of HP conditions is critical for suppressing secondary phases and optimizing the balance between electrical and thermal transport, providing a practical strategy for improving the performance of bornite-based thermoelectric materials.</p><h3>Graphic Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"589 - 599"},"PeriodicalIF":3.1,"publicationDate":"2026-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Vertical 3D Phase-Change Memory with Metallic Liner for Enhanced Resistance Drift Suppression","authors":"Youngsoo Choi, Wonseok Choi, Jinha Choi, Dongmin Han, Donghoon Kang, Sangbum Kim","doi":"10.1007/s13391-026-00655-2","DOIUrl":"10.1007/s13391-026-00655-2","url":null,"abstract":"<div><p>Among non-volatile memories (NVMs), phase-change memory (PCM) has emerged as a promising candidate for various applications owing to its fast switching speed, scalability, and multilevel-cell (MLC) capability. Nevertheless, resistance drift in the amorphous phase remains a critical obstacle to reliable MLC operation. Although metallic liner integration has been shown to mitigate this issue in planar PCM structures, its direct application to vertically stacked 3D architectures pursued for high-density memory requires re-optimization of the liner parameters. Here, we integrate a metallic liner into a vertically stacked 3D PCM structure and conduct finite element method (FEM) simulations to identify a target thickness range of 15–25 nm based on the trade-off between resistance drift suppression and ON/OFF ratio. Based on these results, a 4-layer metallic liner-integrated vertical PCM was fabricated and electrically characterized, achieving a significant reduction in the RESET state drift coefficient at 25 ℃ while maintaining data retention comparable to the conventional device. This suppression extended across all programmed states, confirming the reliability of multilevel operation. However, the continuous metallic liner along the vertical stack introduces a potential parasitic leakage path between adjacent layers. To evaluate this effect, inter-layer read-current coupling was quantified through a simplified 1 × N stack model extended to 64 layers, with the projected mean error remaining below 1 %. These results demonstrate the device-level feasibility of metallic liner integration in vertically stacked PCM with enhanced resistance drift suppression.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"557 - 565"},"PeriodicalIF":3.1,"publicationDate":"2026-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://link.springer.com/content/pdf/10.1007/s13391-026-00655-2.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tae Min Choi, Hwa Rim Lee, Hye Rin Do, Ji Soo Kim, Young Chae Lee, Sung Gyu Pyo
{"title":"Cryogenic Etching for High-Aspect Ratio Patterning: Recent Advancements and Future Prospects","authors":"Tae Min Choi, Hwa Rim Lee, Hye Rin Do, Ji Soo Kim, Young Chae Lee, Sung Gyu Pyo","doi":"10.1007/s13391-026-00653-4","DOIUrl":"10.1007/s13391-026-00653-4","url":null,"abstract":"<div><p>Cryogenic etching has revolutionized the semiconductor fabrication industry by enabling the creation of High-Aspect-Ratio (HAR) structures with a high degree of precision. This review highlights the advantages of cryogenic etching over traditional etching techniques, particularly in achieving anisotropic profiles with minimal physical imperfections. It provides an in-depth analysis of mask materials used in cryogenic etching, exploring their compatibility with the cryogenic process and their potential for achieving precise etching results. Furthermore, the paper discusses innovations in mask technology, including the development of new composite materials that combine polymers with metal additives to enhance their performance in extreme conditions. The study also identifies potential defects, such as Aspect Ratio Dependent Etching (ARDE), Undercut, and Crystal Orientation Dependent Etching (CODE). It discusses the implications of these defects on process optimization. The paper also covers the application of cryogenic etching in developing advanced semiconductor device fabrication techniques, including Through-Silicon Vias (TSVs), nano-trenches, and Cryogenic Atomic Layer Etching (ALE). Overall, this review provides a comprehensive analysis of the evolution of etching techniques and highlights the advantages of cryogenic etching over traditional etching techniques in achieving high precision and integration, critical for the next generation of semiconductor devices.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"497 - 523"},"PeriodicalIF":3.1,"publicationDate":"2026-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sohee Kim, Chanho Jeong, Hyunjong Lee, Eunki Baek, Insung Choi, Junyeong Hwang, Sungjun Park, Dongwook Kim, Jaehoon Park, Youngjun Yun
{"title":"Low-temperature Stamp Transfer of Sol–Gel IGZO Thin Films with Preserved Electrical Properties","authors":"Sohee Kim, Chanho Jeong, Hyunjong Lee, Eunki Baek, Insung Choi, Junyeong Hwang, Sungjun Park, Dongwook Kim, Jaehoon Park, Youngjun Yun","doi":"10.1007/s13391-026-00647-2","DOIUrl":"10.1007/s13391-026-00647-2","url":null,"abstract":"<div><p>Flexible electronic devices that can accommodate mechanical deformations during practical use have attracted significant attention. Oxide semiconductors offer long operational lifetimes, excellent stability, and favorable electrical properties. However, sol-gel-processed oxide semiconductors are inherently brittle and typically require high-temperature annealing at > 500 °C, which limits their integration with stretchable substrates that can withstand only 120–200 °C. Consequently, a low-temperature transfer process is required for the application of oxide semiconductors in stretchable electronic devices. In this study, an indium gallium zinc oxide–ethylene glycol (IGZO–EG) solution was formulated by introducing EG into an IGZO metal precursor, enabling uniform thin-film formation and mechanically stable transfer under low-temperature conditions. The prepared films were transferred onto target substrates using a polydimethylsiloxane (PDMS)-based stamp transfer method. The surface chemistry and electrical properties of the IGZO–EG thin-film transistors (TFTs) before and after transfer were quantitatively investigated using X-ray photoelectron spectroscopy, atomic force microscopy, and electrical measurements. The results demonstrate that the PDMS-based stamp transfer process enables reliable low-temperature transfer of sol-gel-based IGZO thin films while preserving their electrical characteristics. These findings confirmed the feasibility of integrating solution-processed oxide semiconductor thin films with stretchable electronic platforms via a simple and cost-effective transfer approach.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"524 - 533"},"PeriodicalIF":3.1,"publicationDate":"2026-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jeonghoon Lee, Dong Hyun Seo, Gyeong Deok Seo, TaeWan Kim
{"title":"Interfacial Engineering of WS₂ Thin-Film Transistors via O₂ Plasma-Induced WO3−x Buffer Layers","authors":"Jeonghoon Lee, Dong Hyun Seo, Gyeong Deok Seo, TaeWan Kim","doi":"10.1007/s13391-026-00648-1","DOIUrl":"10.1007/s13391-026-00648-1","url":null,"abstract":"<div><p>Reducing contact resistance remains a critical challenge for improving the performance of two-dimensional semiconductor-based field-effect-transistors (FETs). In this study, we investigate the effect of O<sub>2</sub> plasma treatment on the metal/WS<sub>2</sub> interface and its impact on device performance. The plasma treatment induces the formation of an ultrathin WO<sub>3−x</sub> interfacial layer, effectively suppresses metal-induced gap states (MIGS) and mitigates Fermi-level pinning at the contact interface. As a result, the Schottky barrier height is significantly reduced, leading to marked improvements in charge injection and transport characteristics. The optimized WS<sub>2</sub> FET exhibited a 14.4-fold enhancement in field-effect mobility, a 799.6-fold reduction in contact resistance, and a 26.2-fold increase in on-current (I<sub>ON</sub>) compared to pristine devices. These findings demonstrate that O<sub>2</sub> plasma-induced interfacial engineering provides a scalable approach for achieving high-performance WS<sub>2</sub>–based FETs with low-contact resistance.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 5","pages":"409 - 416"},"PeriodicalIF":3.1,"publicationDate":"2026-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148782658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Marcin Gackowski, Katarzyna Mądra-Gackowska, Łukasz Szeleszczuk
{"title":"High-Temperature Thermoelectric Potential of Ba2XReO6 (X = Li, Rb, Cs) Double Perovskites: A First-Principles Study","authors":"Marcin Gackowski, Katarzyna Mądra-Gackowska, Łukasz Szeleszczuk","doi":"10.1007/s13391-026-00654-3","DOIUrl":"10.1007/s13391-026-00654-3","url":null,"abstract":"<div><p>The development of efficient thermoelectric materials for direct waste heat–to–electricity conversion remains a major challenge, particularly for high-temperature applications. In this paper, a systematic first-principles examination of the structural, electronic, elastic, thermal and thermoelectric characteristics of double perovskite oxides, Ba<sub>2</sub><i>X</i>ReO<sub>6</sub> (<i>X</i> = Li, Rb, Cs), is conducted using the density functional theory, alongside Boltzmann transport theory. Structural optimization proves that all compounds are thermodynamically stable in the cubic Fm3̅m phase with negative formation energies. Furthermore, ab initio molecular dynamics simulations performed at 300 K confirm the dynamical stability of the optimized structures. The electronic structure analysis reveals semiconducting behavior in Ba<sub>2</sub>CsReO<sub>6</sub>, Ba<sub>2</sub>LiReO<sub>6</sub>, and Ba<sub>2</sub>RbReO<sub>6</sub>, all exhibiting indirect and narrow band gaps, which are ideal characteristics for thermoelectric transport. The elastic constants obtained and used have met the Born stability requirements, indicating mechanical stability and ductile behavior. A systematic decrease in Debye temperature, melting temperature, and lattice thermal conductivity with increasing A-site ionic radius led to ultralow lattice thermal conductivity of Ba<sub>2</sub>RbReO<sub>6</sub> and Ba<sub>2</sub>CsReO<sub>6</sub>. Thermoelectric transport calculations show positive Seebeck coefficients and enhanced power factors at elevated temperatures. Of the investigated compounds, the Ba<sub>2</sub>RbReO<sub>6</sub> has the largest thermoelectric figure of merit (ZT), owing to an optimum balance between electrical conductivity and reduced thermal conductivity. Overall, our results suggest that Ba<sub>2</sub><i>X</i>ReO<sub>2</sub>, particularly Ba<sub>2</sub>RbReO<sub>2</sub>, are promising candidates for high-temperature thermoelectric applications.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"600 - 617"},"PeriodicalIF":3.1,"publicationDate":"2026-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://link.springer.com/content/pdf/10.1007/s13391-026-00654-3.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Nitrogen Plasma-induced Surface Engineering of MnFe Prussian Blue Analogues for Aqueous Zinc-ion Batteries","authors":"Seunghwan Kim, Dae-wook Kim, In-Kyoung Ahn","doi":"10.1007/s13391-026-00651-6","DOIUrl":"10.1007/s13391-026-00651-6","url":null,"abstract":"<div><p>Surface engineering via N<sub>2</sub> plasma-based ion implantation is presented as a rapid strategy to boost the zinc-storage performance of manganese hexacyanoferrate (MnHCF) cathodes. Precise control of the plasma exposure duration is shown to be essential, with a 1-minute treatment (MnHCF-N1) providing the most significant enhancements in capacity and stability. The MnHCF-N1 electrode exhibits a high specific capacity of 130.9 mAh g<sup>-1</sup>, which represents a 20% increase compared to the pristine sample. Physical characterizations reveal that the 1-minute plasma exposure induces beneficial surface nanopore and a monoclinic-like phase. These structural modifications facilitate faster charge transfer and Zn<sup>2+</sup> diffusion kinetics. This approach offers a facile and efficient route for optimizing the electrochemical properties of Prussian blue analogues in aqueous storage system.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 5","pages":"468 - 477"},"PeriodicalIF":3.1,"publicationDate":"2026-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148782354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Doheon Kim, Gahui Kim, Daeyoon Jeong, Young-Bae Park
{"title":"Effects of the Dielectric Curing Temperature on the Interfacial Adhesion Characteristics of Photosensitive Polyimide/Cu RDL Structures for Fan-Out Packages","authors":"Doheon Kim, Gahui Kim, Daeyoon Jeong, Young-Bae Park","doi":"10.1007/s13391-026-00650-7","DOIUrl":"10.1007/s13391-026-00650-7","url":null,"abstract":"<div><p>The effects of the dielectric curing temperature on the interfacial adhesion characteristics of the photosensitive polyimide (PSPI)/Cu redistribution layer for fan-out packages were systematically investigated using a four-point bending test. X-ray photoelectron spectroscopy and Fourier transform infrared spectroscopy were used to analyze the chemical properties of PSPI. The interfacial adhesion energy increased as the curing temperature increased from 350 to 375 °C. This increase was associated with the progression of the ring-closing reaction accompanied by an increase in imide (C–N) bonding. However, when the curing temperature was further increased to 390 °C, the interfacial adhesion energy decreased, which is attributed to the partial degradation of carbonyl (C=O) bonds under excessive curing conditions. These results indicate that optimizing the curing temperature is critical to achieving reliable PSPI/Cu interfacial adhesion in FOWLP RDL structures.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"549 - 556"},"PeriodicalIF":3.1,"publicationDate":"2026-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Constructing a Ti(002)→TiO2(004)→Pt(111) Texture Inheritance Chain for High-Performance Epitaxial PZT Thin Films","authors":"Chenxi Gao, Jing Xie, Xiaolong Ma, Hongyan Song, Yuanjie Wang, Jianpeng Xing, Chaobo Li","doi":"10.1007/s13391-026-00649-0","DOIUrl":"10.1007/s13391-026-00649-0","url":null,"abstract":"<div><p>Integrating epitaxial Pb(Zr, Ti)O<sub>3</sub> (PZT) thin films on Si requires solving two critical challenges: crystallographic orientation control of the bottom electrode and thermal stress mismatch. This study establishes a “Ti(002)→TiO₂(004)→Pt(111)” texture inheritance pathway, combined with thermal stress modulation, to achieve high-quality epitaxial Pt(111) electrodes. The crystallographic information transfer across layers and its impact on PZT properties are systematically investigated. The texture quality of the Ti layer is amplified through the TiO<sub>2</sub> intermediate layer: any degradation in Ti(002) orientation is magnified, leading to increased dispersion in Pt(111) orientation, which is quantitatively inherited by the PZT layer, following <span>(:{FWHM}_{PZT}approx:1.2times:{FWHM}_{Pt}+0.5^circ:)</span>. By optimizing Ti sputtering and rapid thermal oxidation, a highly oriented rutile TiO<sub>2</sub>(004) buffer layer is obtained, inducing a Pt(111) electrode with FWHM as low as 1.5°. The resulting PZT films exhibit high (001) orientation, dense morphology, and excellent properties (<i>P</i><sub>r</sub> ≈ 15µC/cm²; <i>e</i>₃₁,f = -15.5 C/m<sup>2</sup>). Notably, Pt(111) texture critically governs PZT switching symmetry: when Pt FWHM ≤ 2°, the piezoelectric/ferroelectric curves are perfectly symmetric; for FWHM > 2°, asymmetry increases progressively. Integrating such PZT films into a C-beam piezoelectric MEMS scanning mirror achieves an optical scan angle of ± 40° at 25 V<sub>pp</sub>, demonstrating both large deflection and symmetric scanning. This work provides a reliable fabrication route for high-performance piezoelectric MEMS and elucidates the texture and stress transfer mechanism in heteroepitaxy, offering a universal strategy for integrating complex oxide films on Si.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"534 - 548"},"PeriodicalIF":3.1,"publicationDate":"2026-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367394","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ah-Yeong Lee, Seongyu Lee, Min Jae Sung, Soon-Ki Kwon, Yun-Hi Kim, Soonil Hong, Jong-Hoon Lee, Kwanghee Lee
{"title":"Synergistic Interfacial Engineering with a C₆₀-SB/PFN-Br Hybrid Layer for Suppressing Photocatalytic Degradation in Organic Solar Cells","authors":"Ah-Yeong Lee, Seongyu Lee, Min Jae Sung, Soon-Ki Kwon, Yun-Hi Kim, Soonil Hong, Jong-Hoon Lee, Kwanghee Lee","doi":"10.1007/s13391-026-00652-5","DOIUrl":"10.1007/s13391-026-00652-5","url":null,"abstract":"<div><p>Zinc oxide (ZnO) is one of the most widely used electron transport layers (ETLs) in inverted organic photovoltaics (OPVs). However, its strong photocatalytic activity and abundance of surface defects induce the generation of radical intermediates under illumination, leading to rapid degradation of nonfullerene acceptors (NFAs) and severe efficiency loss. Here, we propose a hybrid ETL composed of a fullerene derivative (C₆₀-SB) modified with a conjugated polyelectrolyte, poly[(9,9-bis(3′-(N, N-dimethylamino)propyl)-2,7-fluorene)-alt-2,7-(9,9-dioctylfluorene)] bromide (PFN-Br), which simultaneously tunes the surface energy and reduces the effective work function (WF) of the ETL. The synergistic C₆₀-SB/PFN-Br interface forms a molecularly ordered, energetically favorable layer that promotes efficient electron extraction and suppresses photocatalytic radical formation. Devices based on C₆₀-SB/PFN-Br exhibit initial power conversion efficiency (~ 9%) comparable to ZnO-based devices but retain over 85% of their efficiency after 10 h of continuous illumination, whereas ZnO-based OPVs degrade below 70%. Spectroscopic analyses confirm that PFN-Br effectively prevents oxidative reactions and radical intermediates at the interface. Moreover, this stabilization effect extends across multiple donor–acceptor systems, establishing the C₆₀-SB/PFN-Br hybrid ETL as a broadly applicable interfacial design strategy for realizing efficient and photostable OPVs.</p><h3>Graphical Abstract</h3><div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"22 6","pages":"579 - 588"},"PeriodicalIF":3.1,"publicationDate":"2026-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149367425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}