{"title":"通过双层InGaZnO有源通道和几何调制改善2T0C DRAM单元的存储操作","authors":"Sang Han Ko, Sung-Min Yoon","doi":"10.1007/s13391-025-00582-8","DOIUrl":null,"url":null,"abstract":"<div><p>To enhance the memory characteristics of the 2-transistor 0-capacitor (2T0C) DRAM cell, the double-layer (DL) InGaZnO channel was strategically introduced and the active geometry was optimally modulated. The DL channel, fabricated by modulating the oxygen partial pressure during RF sputtering, forms a heterojunction interface that introduces an additional conduction path, thereby significantly enhancing the device performance of the transistor. In memory operations, 2T0C DRAM cell employing the DL configuration exhibited more than twice the write speed, reaching a storage node voltage (V<sub>SN</sub>) of 0.8 V within 4 µs, compared to 10 µs for single-layer (SL) counterpart under identical charging conditions. Additionally, the optimal determination of the active geometry in transistors has been demonstrated to enhance charge storage efficiency and minimize V<sub>SN</sub> degradation. As a consequence of the enhanced positive-bias temperature stress stability, the DL device exhibited a data retention time of 44.3 s at 80 °C, which is approximately four times longer than that of the SL counterpart (11.5 s) with identical geometry. These findings confirm that the combined implementation of a DL IGZO channel and optimized device geometry provides an effective strategy for enhancing both the performance and reliability of 2T0C DRAM cell architectures.</p><h3>Graphic Abstract</h3>\n<div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"21 5","pages":"679 - 687"},"PeriodicalIF":2.6000,"publicationDate":"2025-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Improvement in Memory Operation of 2T0C DRAM Cells via Double-Layered InGaZnO Active Channel and Geometry Modulation\",\"authors\":\"Sang Han Ko, Sung-Min Yoon\",\"doi\":\"10.1007/s13391-025-00582-8\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>To enhance the memory characteristics of the 2-transistor 0-capacitor (2T0C) DRAM cell, the double-layer (DL) InGaZnO channel was strategically introduced and the active geometry was optimally modulated. The DL channel, fabricated by modulating the oxygen partial pressure during RF sputtering, forms a heterojunction interface that introduces an additional conduction path, thereby significantly enhancing the device performance of the transistor. In memory operations, 2T0C DRAM cell employing the DL configuration exhibited more than twice the write speed, reaching a storage node voltage (V<sub>SN</sub>) of 0.8 V within 4 µs, compared to 10 µs for single-layer (SL) counterpart under identical charging conditions. Additionally, the optimal determination of the active geometry in transistors has been demonstrated to enhance charge storage efficiency and minimize V<sub>SN</sub> degradation. As a consequence of the enhanced positive-bias temperature stress stability, the DL device exhibited a data retention time of 44.3 s at 80 °C, which is approximately four times longer than that of the SL counterpart (11.5 s) with identical geometry. These findings confirm that the combined implementation of a DL IGZO channel and optimized device geometry provides an effective strategy for enhancing both the performance and reliability of 2T0C DRAM cell architectures.</p><h3>Graphic Abstract</h3>\\n<div><figure><div><div><picture><source><img></source></picture></div></div></figure></div></div>\",\"PeriodicalId\":536,\"journal\":{\"name\":\"Electronic Materials Letters\",\"volume\":\"21 5\",\"pages\":\"679 - 687\"},\"PeriodicalIF\":2.6000,\"publicationDate\":\"2025-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electronic Materials Letters\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s13391-025-00582-8\",\"RegionNum\":4,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"MATERIALS SCIENCE, MULTIDISCIPLINARY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electronic Materials Letters","FirstCategoryId":"88","ListUrlMain":"https://link.springer.com/article/10.1007/s13391-025-00582-8","RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
Improvement in Memory Operation of 2T0C DRAM Cells via Double-Layered InGaZnO Active Channel and Geometry Modulation
To enhance the memory characteristics of the 2-transistor 0-capacitor (2T0C) DRAM cell, the double-layer (DL) InGaZnO channel was strategically introduced and the active geometry was optimally modulated. The DL channel, fabricated by modulating the oxygen partial pressure during RF sputtering, forms a heterojunction interface that introduces an additional conduction path, thereby significantly enhancing the device performance of the transistor. In memory operations, 2T0C DRAM cell employing the DL configuration exhibited more than twice the write speed, reaching a storage node voltage (VSN) of 0.8 V within 4 µs, compared to 10 µs for single-layer (SL) counterpart under identical charging conditions. Additionally, the optimal determination of the active geometry in transistors has been demonstrated to enhance charge storage efficiency and minimize VSN degradation. As a consequence of the enhanced positive-bias temperature stress stability, the DL device exhibited a data retention time of 44.3 s at 80 °C, which is approximately four times longer than that of the SL counterpart (11.5 s) with identical geometry. These findings confirm that the combined implementation of a DL IGZO channel and optimized device geometry provides an effective strategy for enhancing both the performance and reliability of 2T0C DRAM cell architectures.
期刊介绍:
Electronic Materials Letters is an official journal of the Korean Institute of Metals and Materials. It is a peer-reviewed international journal publishing print and online version. It covers all disciplines of research and technology in electronic materials. Emphasis is placed on science, engineering and applications of advanced materials, including electronic, magnetic, optical, organic, electrochemical, mechanical, and nanoscale materials. The aspects of synthesis and processing include thin films, nanostructures, self assembly, and bulk, all related to thermodynamics, kinetics and/or modeling.