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The generation of simulator-based systems for microcode development 基于模拟器的微码开发系统的生成
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808221
C. Charlton, D. Jackson, P. Leng
{"title":"The generation of simulator-based systems for microcode development","authors":"C. Charlton, D. Jackson, P. Leng","doi":"10.1145/800016.808221","DOIUrl":"https://doi.org/10.1145/800016.808221","url":null,"abstract":"The work described in this paper is directed at the structure and construction of simulator-based systems for the development and testing of microcode. While the value of such software tools is widely recognised, their availability in the early stages of the development cycle of a new machine is subject to the time and effort required for their implementation. We describe here the design of a system to assist in their generation from the specifications of the machine to be simulated. The system is based on the application of generalised program and data structures to facilitate the rapid implementation of an efficient simulation 'nucleus', which is integrated with an 'environment' of machine-independent routines for user interaction with the simulated machine.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115026666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A model of clocked micro-architectures for firmware engineering and design automation applications 一个用于固件工程和设计自动化应用的时钟微架构模型
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808238
S. Dasgupta
{"title":"A model of clocked micro-architectures for firmware engineering and design automation applications","authors":"S. Dasgupta","doi":"10.1145/800016.808238","DOIUrl":"https://doi.org/10.1145/800016.808238","url":null,"abstract":"An aspect common to many problems in firmware engineering is the use of a micromachine model that is, an abstract and selective view of the structure and behavior of the computer at the micro-architectural level. The success, utility and generality of a particular microprogramming language, compaction technique, or verification strategy may rest critically on the expressive power and generality of the underlying micromachine model. While a number of such models have been proposed in the past we believe that these are all, for one reason or another, in adequate. In this paper we present a new, generalized, multipurpose model of clocked micro-architectures intended to provide a uniform framework for use in both firmware engineering and design automation applications.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129825522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
An algorithm for selection of migration candidates 一种选择迁移候选者的算法
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808224
B. Holtkamp, P. Wagner
{"title":"An algorithm for selection of migration candidates","authors":"B. Holtkamp, P. Wagner","doi":"10.1145/800016.808224","DOIUrl":"https://doi.org/10.1145/800016.808224","url":null,"abstract":"The NP-Completeness of the selection problem of vertical migration candidates is shown by reducing it to the NP-complete knapsack problem. Based on approximation algorithms for the latter problem a new algorithm is presented, which takes into account the call relations between functions in a complex system. Then the developed algorithm is applied to the UNIX operating system as a representative for complex systems.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122778981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Patchable control store for reduced microcode risk in a VLSI VAX microcomputer 用于降低VLSI VAX微型计算机微码风险的可修补控制存储器
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808216
Richard E. Calcagni, W. Sherwood
{"title":"Patchable control store for reduced microcode risk in a VLSI VAX microcomputer","authors":"Richard E. Calcagni, W. Sherwood","doi":"10.1145/800016.808216","DOIUrl":"https://doi.org/10.1145/800016.808216","url":null,"abstract":"A VLSI VAX microcomputer, which implements the native VAX computer architecture and instruction set, uses 16K by 40 bits of ROM control store. To decrease the cost of making changes to released microcode, the hardware supports a patching mechanism whereby control flow can be switched between the read-only control memory and a smaller writable control memory. This paper describes the system design considerations that led to the development of the patchable control store, actual implementation of the control store, the effectiveness of the patching scheme, and its impact on system performance.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"158 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127229897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Improved instruction formation in the exhaustive local microcode compaction algorithm 改进了穷极局部微码压缩算法中的指令形成
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808220
Richard P. Atkins
{"title":"Improved instruction formation in the exhaustive local microcode compaction algorithm","authors":"Richard P. Atkins","doi":"10.1145/800016.808220","DOIUrl":"https://doi.org/10.1145/800016.808220","url":null,"abstract":"An algorithm has been developed to compact the micro-operations of horizontal microcode into optimal segments of straight-line microinstructions. The Quine modified (QM) algorithm generates solutions for 24 micro-operations in 2 sec. of VAX processing time. It generates a small number of solutions. A Pascal program that models the algorithm has been developed. A proof that the algorithm produces a minimal solution is given.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114377365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Software tools used in the development of a VLSI VAX Microcomputer 开发VLSI VAX微型计算机时使用的软件工具
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808213
R. Gries, J. A. Woodward
{"title":"Software tools used in the development of a VLSI VAX Microcomputer","authors":"R. Gries, J. A. Woodward","doi":"10.1145/800016.808213","DOIUrl":"https://doi.org/10.1145/800016.808213","url":null,"abstract":"This paper presents an overview of the software tools used in the development of the microcode for Digital's VLSI VAX Microcomputers. The software tools effort consisted of five basic areas: assembly, simulation, verification, and statistical analysis.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114928142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A “metasimulator” for microcoded processors 微编码处理器的“元模拟器”
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808223
J. Eldridge
{"title":"A “metasimulator” for microcoded processors","authors":"J. Eldridge","doi":"10.1145/800016.808223","DOIUrl":"https://doi.org/10.1145/800016.808223","url":null,"abstract":"In a computer design project where software and hardware development proceed in parallel, it is essential that some form of simulation is available early so that the software can be breadboarded before the hardware is stable. The simulator must be readily modifiable to accommodate evolving hardware design. For a project at AT&T Bell Laboratories involving several processors of different designs, a program was constructed that generates a simulator from a description of the hardware block diagram. This paper describes the design of that program.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125281509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
An automatic migration scheme based on modular microcode and structured firmware sequencing 一种基于模块化微码和结构化固件排序的自动迁移方案
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808226
C. Papachristou, V. Immaneni, D. Sarma
{"title":"An automatic migration scheme based on modular microcode and structured firmware sequencing","authors":"C. Papachristou, V. Immaneni, D. Sarma","doi":"10.1145/800016.808226","DOIUrl":"https://doi.org/10.1145/800016.808226","url":null,"abstract":"The aim of this work is to construct an automated migration system from software into firmware for functions or algorithms with complex logical structure. The approach is based on an already developed structured microcontrol scheme endowed with compound sequencing capabilities suitable for modular microprogramming. The basic idea is to extract, via compilation techniques, the sequencing structure of the function. This is expressed into complex firmware sequencing constructs such as modular calls and modular loops. Migration is then effected by sequence calls into microcode modules interpreting a target machine architecture on which the function is tested. The migration technique is implemented in a simulated environment consisting of several firmware design tools. The system has the option to produce firmware code suitable for PLA embodiment, thus facilitating function migration into VLSI microcode.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134430300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Transparent microprogramming in support of abstract type oriented dynamic vertical migration 透明微编程，支持面向抽象类型的动态垂直迁移
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808227
E. M. Carter, R. I. Winner
{"title":"Transparent microprogramming in support of abstract type oriented dynamic vertical migration","authors":"E. M. Carter, R. I. Winner","doi":"10.1145/800016.808227","DOIUrl":"https://doi.org/10.1145/800016.808227","url":null,"abstract":"Migration of functionality into microcode for the purposes of performance improvement and increased security may be oriented toward the migration of abstract data types. This provides a model of migration consistent with current models of machine architecture. An advantage is that information in making migration decisions can be drawn from the programmer's model of his problem as encapsulated in the data types in the program. In addition, the migration can be sensitive to changes in type visibility in various execution environments of the program. The paper discusses language aspects of abstract type oriented migration (ATOM) and details a working prototype implementation. Ada is used as the source language in the description of ATOM but C is used in the prototype.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115083562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Alternative proposals for implementing Prolog concurrently and implications regarding their respective microarchitectures 并发实现Prolog的可选建议以及它们各自微架构的含义
MICRO 17 Pub Date : 1984-12-01 DOI: 10.1145/800016.808229
C. Ponder, Y. Patt
{"title":"Alternative proposals for implementing Prolog concurrently and implications regarding their respective microarchitectures","authors":"C. Ponder, Y. Patt","doi":"10.1145/800016.808229","DOIUrl":"https://doi.org/10.1145/800016.808229","url":null,"abstract":"Prolog has become a subject of much discussion of late. It has been suggested as the logical language for programming expert systems. A parallel variant is said to be the language of the Japanese 5th Generation Project. In this paper the standard Prolog language is defined and shown to be a restriction of Logic Programming. Several alternative schemes, which have been proposed for improving the performance of Prolog, are examined. Some schemes change the semantics of the language; these effects are discussed. All schemes have implications on the microarchitecture of the implementing engine; these implications are studied.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122040538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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