{"title":"用于降低VLSI VAX微型计算机微码风险的可修补控制存储器","authors":"Richard E. Calcagni, W. Sherwood","doi":"10.1145/800016.808216","DOIUrl":null,"url":null,"abstract":"A VLSI VAX microcomputer, which implements the native VAX computer architecture and instruction set, uses 16K by 40 bits of ROM control store. To decrease the cost of making changes to released microcode, the hardware supports a patching mechanism whereby control flow can be switched between the read-only control memory and a smaller writable control memory. This paper describes the system design considerations that led to the development of the patchable control store, actual implementation of the control store, the effectiveness of the patching scheme, and its impact on system performance.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"158 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Patchable control store for reduced microcode risk in a VLSI VAX microcomputer\",\"authors\":\"Richard E. Calcagni, W. Sherwood\",\"doi\":\"10.1145/800016.808216\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A VLSI VAX microcomputer, which implements the native VAX computer architecture and instruction set, uses 16K by 40 bits of ROM control store. To decrease the cost of making changes to released microcode, the hardware supports a patching mechanism whereby control flow can be switched between the read-only control memory and a smaller writable control memory. This paper describes the system design considerations that led to the development of the patchable control store, actual implementation of the control store, the effectiveness of the patching scheme, and its impact on system performance.\",\"PeriodicalId\":447708,\"journal\":{\"name\":\"MICRO 17\",\"volume\":\"158 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1984-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MICRO 17\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/800016.808216\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 17","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/800016.808216","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Patchable control store for reduced microcode risk in a VLSI VAX microcomputer
A VLSI VAX microcomputer, which implements the native VAX computer architecture and instruction set, uses 16K by 40 bits of ROM control store. To decrease the cost of making changes to released microcode, the hardware supports a patching mechanism whereby control flow can be switched between the read-only control memory and a smaller writable control memory. This paper describes the system design considerations that led to the development of the patchable control store, actual implementation of the control store, the effectiveness of the patching scheme, and its impact on system performance.