MICRO 17Pub Date : 1984-12-01DOI: 10.1145/800016.808235
P. Marwedel
{"title":"A retargetable compiler for a high-level microprogramming language","authors":"P. Marwedel","doi":"10.1145/800016.808235","DOIUrl":"https://doi.org/10.1145/800016.808235","url":null,"abstract":"A compiler for the generation of microcode for a high-level microprogramming language is presented. The compiler is target machine independent. The input to the compiler consists of a hardware description, a high-level microprogram and a set of program transformation rules. The compiler is able to take advantage of optimization techniques which are used by microprogrammers because many of these can be represented by program transformation rules.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125779366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 17Pub Date : 1984-12-01DOI: 10.1145/800016.808219
T. Baba, M. Ikeda, K. Yamazaki, K. Okuda
{"title":"Compaction of two-level microprograms for a multiprocessor computer","authors":"T. Baba, M. Ikeda, K. Yamazaki, K. Okuda","doi":"10.1145/800016.808219","DOIUrl":"https://doi.org/10.1145/800016.808219","url":null,"abstract":"An optimizing loader has been designed and developed for two-level microprograms of a multiprocessor computer. In the computer, a microinstruction activates nanoprograms in multiprocessors, specifying nanoprogram start address and the processors to be activated. This scheme allows the loader to utilize the same nanoprogram among several microinstructions, which activate it, and compact the nanoaddress space by nanocode movement. The experimental results show that (i) the nanoprogram sizes are reduced from 17.3 to 31.0 % and (ii) the effect of the reduction is proportional to the number of microinstructions.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"267 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129890230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 17Pub Date : 1984-12-01DOI: 10.1145/800016.808208
Clifford L. Hall
{"title":"A microcoded multiprocessor crossbar network communications controller","authors":"Clifford L. Hall","doi":"10.1145/800016.808208","DOIUrl":"https://doi.org/10.1145/800016.808208","url":null,"abstract":"This paper describes the architecture and microcode organization of an Interprocessor Communications Controller (ICC) for a multi-microcomputer system employing a fully parallel crossbar switch. The communications controller provides fast data transmission between seven microcomputers via nonvectored interrupts. Also, within the communications controller, programmable 16-bit down-counting timers are available to each of the microcomputers within the multi-microcomputer system.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134229837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 17Pub Date : 1984-12-01DOI: 10.1145/800016.808215
W. Sherwood
{"title":"A prototype engineering tester for microcode and hardware debugging","authors":"W. Sherwood","doi":"10.1145/800016.808215","DOIUrl":"https://doi.org/10.1145/800016.808215","url":null,"abstract":"A custom test system was developed to assist in the integration of the microcode and components of a VLSI VAX Microcomputer prototype system. Microcode debugging ease (on the hardware) and leverage is gained by hierarchical accumulation of access and execution operations for the prototype. VAX-11 750-computer-based software and custom UNIBUS-interconnect-based tester hardware comprise this Engineering Tester (fondly called ET). Interactively entered high-level commands to ET software communicate with the tester hardware and the prototype through UNIBUS control and data registers. This paper presents a summary of the methodology and CAD verification tools used in designing the VLSI VAX system. the software and hardware architecture of ET. a look at the implementation and at the leverage gained by building ET based on existing software and hardware tools, and finally, a review of ET applications during the debug phase.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134072982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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