{"title":"一种微编码多处理器跨栏网络通信控制器","authors":"Clifford L. Hall","doi":"10.1145/800016.808208","DOIUrl":null,"url":null,"abstract":"This paper describes the architecture and microcode organization of an Interprocessor Communications Controller (ICC) for a multi-microcomputer system employing a fully parallel crossbar switch. The communications controller provides fast data transmission between seven microcomputers via nonvectored interrupts. Also, within the communications controller, programmable 16-bit down-counting timers are available to each of the microcomputers within the multi-microcomputer system.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A microcoded multiprocessor crossbar network communications controller\",\"authors\":\"Clifford L. Hall\",\"doi\":\"10.1145/800016.808208\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the architecture and microcode organization of an Interprocessor Communications Controller (ICC) for a multi-microcomputer system employing a fully parallel crossbar switch. The communications controller provides fast data transmission between seven microcomputers via nonvectored interrupts. Also, within the communications controller, programmable 16-bit down-counting timers are available to each of the microcomputers within the multi-microcomputer system.\",\"PeriodicalId\":447708,\"journal\":{\"name\":\"MICRO 17\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1984-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MICRO 17\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/800016.808208\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 17","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/800016.808208","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A microcoded multiprocessor crossbar network communications controller
This paper describes the architecture and microcode organization of an Interprocessor Communications Controller (ICC) for a multi-microcomputer system employing a fully parallel crossbar switch. The communications controller provides fast data transmission between seven microcomputers via nonvectored interrupts. Also, within the communications controller, programmable 16-bit down-counting timers are available to each of the microcomputers within the multi-microcomputer system.
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