A model of clocked micro-architectures for firmware engineering and design automation applications

An aspect common to many problems in firmware engineering is the use of a micromachine model that is, an abstract and selective view of the structure and behavior of the computer at the micro-architectural level. The success, utility and generality of a particular microprogramming language, compaction technique, or verification strategy may rest critically on the expressive power and generality of the underlying micromachine model. While a number of such models have been proposed in the past we believe that these are all, for one reason or another, in adequate. In this paper we present a new, generalized, multipurpose model of clocked micro-architectures intended to provide a uniform framework for use in both firmware engineering and design automation applications.