A “metasimulator” for microcoded processors

Abstract

In a computer design project where software and hardware development proceed in parallel, it is essential that some form of simulation is available early so that the software can be breadboarded before the hardware is stable. The simulator must be readily modifiable to accommodate evolving hardware design. For a project at AT&T Bell Laboratories involving several processors of different designs, a program was constructed that generates a simulator from a description of the hardware block diagram. This paper describes the design of that program.