2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)最新文献_第2页

Impact of Dopant variations on Junctionless Cylindrical Nanowire FETs 掺杂剂变化对无结圆柱纳米线场效应管的影响

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179876

Ankush Chattopadhyay, Ankita Pathak, P. Mukherjee

引用次数: 2

Determination of Structural, Electronic, Optical and Mechanical Properties of Brookite TiO2 Using Various Exchange-Correlation 用各种交换相关法测定钛矿的结构、电子、光学和力学性能

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179928

Neerja Dharmale, S. Chaudhury, C. Pandey, Rupesh Mahamune

{"title":"Determination of Structural, Electronic, Optical and Mechanical Properties of Brookite TiO2 Using Various Exchange-Correlation","authors":"Neerja Dharmale, S. Chaudhury, C. Pandey, Rupesh Mahamune","doi":"10.1109/VLSIDCS47293.2020.9179928","DOIUrl":"https://doi.org/10.1109/VLSIDCS47293.2020.9179928","url":null,"abstract":"This paper presents a study and analysis applicable to structural, electronic, optical and mechanical properties of one of rare variant of Titanium dioxide (TiO2) i.e. brookite using self-consistent Orthogonalized Linear Combination of Atomic Orbitals method (OLCAO) under the framework of Density Functional Theory (DFT). Structural, electronic and mechanical properties are investigated using Generalized Gradient Approximation (GGA) with Perdew-Burke-Ernzerhof (PBE), Perdew-Burke-Ernzerhof solid (PBES), Becke-Perdew86 (BP86), Perdew Wang91(PW91) and Becke88-Perdew Wang91 Correlation(BPW91) as exchange-correlation. Correlation of electronic and optical properties are performed using GGA-PBES and Meta-gga(MGGA)-Tran and Blaha(TB09). The observed data are match up with the previously reported computational as well as experimental data. Obtained lattice parameters using GGA-PBES, Bond length between Ti and O using PBE and BPW91, bandgap value using MGGA-TB09 and bulk modulus using PW91 and BPW91 matches very well with the experimental values. Comparision using GGA-PBES and MGGA- (TBO9) shows that calculated dielectric constant and refractive index as obtained using GGA-PBES are higher than MGGA approach and optical absorption for brookite TiO2 occurs in UV region while absorption spectrum using MGGA shifts the wavelength towards the lower energy band of EM spectrum.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"48 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128905933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Design Of High Performance Digital Divider 高性能数字分频器的设计

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179903

Karan Kataria, Sunil Patel

引用次数: 3

Realization of Built-In Self Test(BIST) Enabled Memory(RAM) Using VHDL and Implementation in Spartan6 FPGA board 基于VHDL的内置自检(BIST)内存的实现及其在Spartan6 FPGA板上的实现

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179879

Tapas Tewary, Shanu Dey, Supratim Roy

{"title":"Realization of Built-In Self Test(BIST) Enabled Memory(RAM) Using VHDL and Implementation in Spartan6 FPGA board","authors":"Tapas Tewary, Shanu Dey, Supratim Roy","doi":"10.1109/VLSIDCS47293.2020.9179879","DOIUrl":"https://doi.org/10.1109/VLSIDCS47293.2020.9179879","url":null,"abstract":"Built-In Self Test (BIST) is a technique that allows a set up to check itself for any error on its own. BIST is a screening mechanism that places the testing functions physically with the circuit under test (CUT).BIST can make the system-level design process much more simple in essential applications where system reliability is predominant, and \"failure is not an option.\" The decision to execute a critical mission must be made only if the complete system is running without any error. BIST structures generate pseudo random combinations and output results for an exclusive circuit under test are compared. BIST can be implemented on entire designs, design blocks or structures within design blocks. Memory is a complex architecture (fabrication wise) and used in a large number of applications. BIST is basically used to help in the testing of memory with the help of a few extra pins. In fact, while testing a memory using BIST, applying a simple clock signal along with a few pins helps test the entire memory IC. The proposed BIST enabled RAM is designed using VHDL and implemented successfully into SPARTAN 6 Field Programmable Gate Array (FPGA) board.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126218304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

High Speed Buried Channel In0.53Ga0.47As/InP MOSFET with Corner Spacer for Low Power Applications 高速埋道In0.53Ga0.47As/InP MOSFET与角间隔低功耗应用

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179902

S. Mohanty, Sikha Mishra, M. Mohapatra, G. P. Mishra

引用次数: 1

Analysis of All Optical Dual Control Dual SOA TOAD Based 2’s Complement Generator 基于全光双控双SOA TOAD的补码发生器分析

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179909

K. Maji, K. Mukherjee, M. Mandal

引用次数: 3

Development of Aluminium Based Magnetic Composites & Study on Chemical Properties at Sea Water Environment 铝基磁性复合材料的研制及海水环境化学性能研究

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179916

S. Debnath, Rajib Gupta, A. K. Pramanick

引用次数: 0

Simulation of Triple Gate Spin Field-Effect Transistor and its Applications to Digital Logic 三栅自旋场效应晶体管的仿真及其在数字逻辑中的应用

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179894

G. Malik, Mubashir Ahmad, F. A. Khanday, N. Parveen

引用次数: 0

Design of Inline Coaxial Probe to RGW Transition in Ku and K Band Ku和K波段RGW跃迁同轴探头设计

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179896

P. Debnath, A. Deyasi, Ujjwal Mondal

引用次数: 0

A 2.5mW Low-Power Dual VCO Quantizer for ∑-∆ Modulator in 0.09μm CMOS 用于0.09μm CMOS∑-∆调制器的2.5mW低功耗双压控振荡器

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179869

A. Chavan, Sachin Manohar Ranasubhe, Rohit N, H. V. Ravish Aradhya

{"title":"A 2.5mW Low-Power Dual VCO Quantizer for ∑-∆ Modulator in 0.09μm CMOS","authors":"A. Chavan, Sachin Manohar Ranasubhe, Rohit N, H. V. Ravish Aradhya","doi":"10.1109/VLSIDCS47293.2020.9179869","DOIUrl":"https://doi.org/10.1109/VLSIDCS47293.2020.9179869","url":null,"abstract":"Analog to digital converters are an essential requirement for signal processing application as it relates to real world signal that are continuous in nature and convert it into digital form. This paper depicts design and analysis of Dual Voltage Controlled Oscillator (VCO) enabled quantizer loop structure in continuous time ∑-∆ modulator in 0.09μm technology with the use of Cadence Virtuoso tool. The Major element of continuous time ∑-∆ modulator is VCO that converts voltages in to oscillating frequency and a quantizer will quantize the respective frequency to thermometric code. Dual VCO quantizer is designed with 3stage, 5stage and 7stage ring oscillator based VCO and 1-bit quantizer having Logic structure reduced flip flop (LRFF). Maximum Bandwidth of 3stage, 5stage, and 7stage current starved ring oscillator is 40.39MHz, 17.89MHz, and 15.54MHz respectively. Return to Zero DAC (RZ-DAC) block is used as feedback path to dual VCO Quantizer to reduce even harmonics. Result analysis shows that power consumption of the entire design of dual VCO quantizer circuit turns to be 2.15mW for the supply of 1.8V in 0.09μm VLSI technology which is efficient compared to other previous works.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"275 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128141136","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0