基于VHDL的内置自检(BIST)内存的实现及其在Spartan6 FPGA板上的实现

Tapas Tewary, Shanu Dey, Supratim Roy
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引用次数: 1

摘要

内置自检(BIST)是一种允许设置自己检查任何错误的技术。BIST是一种筛选机制,将测试功能与被测电路(CUT)物理地放在一起。在系统可靠性占主导地位的重要应用程序中,BIST可以使系统级设计过程更加简单,并且“不允许出现故障”。只有在整个系统没有任何错误地运行时,才能决定执行关键任务。比较了BIST结构产生的伪随机组合和被测独占电路的输出结果。BIST可以在整个设计、设计块或设计块中的结构上实现。内存是一个复杂的体系结构(制造方面),在大量应用程序中使用。BIST基本上是用一些额外的引脚来帮助测试内存。事实上,在使用BIST测试内存时,应用一个简单的时钟信号和几个引脚有助于测试整个内存IC。所提出的支持BIST的RAM是使用VHDL设计的,并成功地实现在SPARTAN 6现场可编程门阵列(FPGA)板上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Realization of Built-In Self Test(BIST) Enabled Memory(RAM) Using VHDL and Implementation in Spartan6 FPGA board
Built-In Self Test (BIST) is a technique that allows a set up to check itself for any error on its own. BIST is a screening mechanism that places the testing functions physically with the circuit under test (CUT).BIST can make the system-level design process much more simple in essential applications where system reliability is predominant, and "failure is not an option." The decision to execute a critical mission must be made only if the complete system is running without any error. BIST structures generate pseudo random combinations and output results for an exclusive circuit under test are compared. BIST can be implemented on entire designs, design blocks or structures within design blocks. Memory is a complex architecture (fabrication wise) and used in a large number of applications. BIST is basically used to help in the testing of memory with the help of a few extra pins. In fact, while testing a memory using BIST, applying a simple clock signal along with a few pins helps test the entire memory IC. The proposed BIST enabled RAM is designed using VHDL and implemented successfully into SPARTAN 6 Field Programmable Gate Array (FPGA) board.
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