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2009 13th International Workshop on Computational Electronics最新文献

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Moore's Law Past 32nm: Future Challenges in Device Scaling 超越32nm的摩尔定律:器件扩展的未来挑战
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091124
K. Kuhn
{"title":"Moore's Law Past 32nm: Future Challenges in Device Scaling","authors":"K. Kuhn","doi":"10.1109/IWCE.2009.5091124","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091124","url":null,"abstract":"This paper explores the challenges facing process generations past the 32 nm technology node and speculates on what new solutions will be needed. The challenges facing planar and multiple-gate devices are compared and contrasted. Resistance and capacitance challenges are reviewed in relation to past history and on-going research. Key enhancers such as high-k metal-gate (HiK-MG), substrate and channel orientation, as well as NMOS and PMOS stress are discussed in relation to the challenges of the coming transistor generations.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131766191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 77
Stacking Misalignments in Bilayer Graphene 双层石墨烯的堆叠失调
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091155
H. Raza, E. Kan
{"title":"Stacking Misalignments in Bilayer Graphene","authors":"H. Raza, E. Kan","doi":"10.1109/IWCE.2009.5091155","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091155","url":null,"abstract":"The electronic-structure of a bilayer graphene is different from the single layer graphene due to coupling between the two layers. This coupling is a function of stacking distance as well as relative orientation of the two layers. We computationally study the electronic structure and electric-field modulation for these stacking misalignments in Bernal (Atilde - B) stacked bilayer graphene using the extended Huckel theory. We report that certain stacking misalignments, either induced from adjacent dielectrics or stress, would lead to various characteristics of electronic-structure and out-of-plane electric-field modulation, which can have a significant effect on band gap opening.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134117651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Scaling MOSFETs to 10 nm: Coulomb Effects, Source Starvation, and Virtual Source 缩放mosfet到10纳米:库仑效应，源饥饿，和虚拟源
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091145
M. Fischetti, S. Jin, T. Tang, P. Asbeck, Y. Taur, S. Laux, N. Sano
{"title":"Scaling MOSFETs to 10 nm: Coulomb Effects, Source Starvation, and Virtual Source","authors":"M. Fischetti, S. Jin, T. Tang, P. Asbeck, Y. Taur, S. Laux, N. Sano","doi":"10.1109/IWCE.2009.5091145","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091145","url":null,"abstract":"In our attempts to scale FETs to the 10 nm length, alternatives to conventional Si CMOS are sought on the grounds that: (1) Si seems to have reached its technological and performance limits and (2) the use of alternative high-mobility channel materials will provide the missing performance. With the help of numerical simulations here we establish the reasons why indeed Si seems to have hit an intrinsic performance barrier and whether or not high mobility semiconductors can indeed grant us our wishes. The role of long-and short-range electron-electron interactions are revisited together with a recent analysis of the historical performance trends. The density-of-states (DOS) bottleneck and source starvation issues are also reviewed to see what advantage alternative substrates may bring us. Finally, the well-known ‘virtual source model’ is analyzed to assess whether it can be used as a quantitative tool to guide us to the 10 nm gate length.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132916108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Semiconductor Technology-Trends, Challenges and Opportunities 半导体技术——趋势、挑战和机遇
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091147
G. Patton
{"title":"Semiconductor Technology-Trends, Challenges and Opportunities","authors":"G. Patton","doi":"10.1109/IWCE.2009.5091147","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091147","url":null,"abstract":"Traditional CMOS scaling, which was driving device performance during the past several decades, is approaching atomistic and quantum-mechanical boundaries. Semiconductor R&D innovation have never been more critical to drive technology scaling and performance. The development of leading-edge silicon technology requires long-term investments and collaboration in fundamental research to solve the significant challenges of the future technology nodes at an affordable cost. Computational techniques will be a critical tool in this effort. This talk will describe the semiconductor technology future directions, challenges and opportunities.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"7 11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114614128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Radial Boundary Forces-Modulated Valence Band Structure of Ge (110) Nanowire 径向边界力-锗(110)纳米线的价带结构
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091142
Honghuai Xu, Yuhui He, Yuning Zhao, G. Du, Jinfeng Kang, R. Han, Xiaoyan Liu, Chun Fan
{"title":"Radial Boundary Forces-Modulated Valence Band Structure of Ge (110) Nanowire","authors":"Honghuai Xu, Yuhui He, Yuning Zhao, G. Du, Jinfeng Kang, R. Han, Xiaoyan Liu, Chun Fan","doi":"10.1109/IWCE.2009.5091142","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091142","url":null,"abstract":"For the radial boundary force induced in the process, the strain energy distribution and strain tensor components in Ge (110) nanowire (NW) are calculated by finite element method. Based on the strain distribution, we compute valence band structures with different radial forces. As increasing force values, top valence subbands shift downwards. The influence on the corresponding effective masses and density of states are also investigated.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"200 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115813247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Calculation of Hole Mobility in Ge and III-V p-Channels Ge和III-V - p通道中空穴迁移率的计算
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091089
Yan Zhang, M. Fischetti
{"title":"Calculation of Hole Mobility in Ge and III-V p-Channels","authors":"Yan Zhang, M. Fischetti","doi":"10.1109/IWCE.2009.5091089","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091089","url":null,"abstract":"We present theoretical results regarding the hole mobility in Ge, GaAs, InGaAs, InSb and GaSb p-channels with SiO\u0000 2\u0000 insulator. The valence subband structure is calculated self-consistently within the framework of a six-band k .\u0000 p and finite-difference methods. Various scattering processes, non-polar (NP) phonon scattering (acoustic and optical), longitudinal-optical (LO) phonon scattering (Frohlich scattering, III-Vs only), alloy scattering (AL) (InGaAs only) and surface roughness (SR) scattering are included in the calculation. Dielectric screening effects on SR and LO scattering are also taken into account. The results show that Ge and III-V materials have great potential in enhancing hole mobility above the 'universal' Si value. The application of strain, especially uniaxial stress for Ge p-channels and biaxially compressive stress for III-V p-channels, is found to have a significant beneficial effect. Among strained p-channels, InSb yields the largest mobility enhancement. Our theoretical results will finally be compared with available experimental data.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"53 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120873958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Physical Modeling of Microwave Transistors Using a Full-Band/Full-Wave Simulation Approach 微波晶体管的全波段/全波仿真物理建模
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091139
J. Ayubi-Moak, R. Akis, M. Saraniti, D. Ferry, S. Goodnick
{"title":"Physical Modeling of Microwave Transistors Using a Full-Band/Full-Wave Simulation Approach","authors":"J. Ayubi-Moak, R. Akis, M. Saraniti, D. Ferry, S. Goodnick","doi":"10.1109/IWCE.2009.5091139","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091139","url":null,"abstract":"In this work, a full-band Cellular Monte Carlo (CMC) device simulator is self-consistently coupled to an alternate-direction implicit (ADI) finite-difference time-domain (FDTD) full-wave solver. This simulation tool is then used to study the high-frequency response of a dual-finger gate GaAs MESFET via direct S-parameter extraction from time-domain simulation results.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128032012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Numerical Simulation of a DNA Sensor Based on the CNT-Gold Island Structure 基于碳纳米管金岛结构的DNA传感器的数值模拟
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091132
Gyudae Choe, Jun-Myung Woo, Y. Park, Y. Chang, Jeseung Oh, K. Yoo
{"title":"Numerical Simulation of a DNA Sensor Based on the CNT-Gold Island Structure","authors":"Gyudae Choe, Jun-Myung Woo, Y. Park, Y. Chang, Jeseung Oh, K. Yoo","doi":"10.1109/IWCE.2009.5091132","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091132","url":null,"abstract":"A numerical simulation has been performed for the DNA sensors based on the field-effect-transistor (FET) structure of a CNT with the gold island- attached on the CNT tube. The model uses the Poisson-drift-diffusion theory for the CNT transistor and considers the charge exchange between the interfaces between the CNT and gold island, gold and the linker molecules. In order to compare with experiments, an example device is simulated to predict the response of the sensor to the target DNA's in both the air and aqueous solution.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130466000","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 3D Parallel Monte Carlo Simulator for Semiconductor Devices 用于半导体器件的三维并行蒙特卡罗模拟器
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091078
Wei Zhang, G. Du, Qiang Li, Aiqing Zhang, Z. Mo, Xiaoyan Liu, Pingwen Zhang
{"title":"A 3D Parallel Monte Carlo Simulator for Semiconductor Devices","authors":"Wei Zhang, G. Du, Qiang Li, Aiqing Zhang, Z. Mo, Xiaoyan Liu, Pingwen Zhang","doi":"10.1109/IWCE.2009.5091078","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091078","url":null,"abstract":"We developed a 3D parallel full band Monte Carlo simulator for semiconductor devices. This enables us to simulate 3D devices on high performance multiprocessor machines. By utilizing the JASMIN [1] software package, parallel execution issues such as processors communication, grid partitioning and load balancing are handled easily and efficiently. The 3D MC simulator is validated by comparing its results with that from 2D 70nm SOI MOSFET simulations. We present speedup and load balancing results of our 3D simulator to show the parallel efficiency. A FinFet model [2], [3] is simulated for application.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130552438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Self-Consistent Simulation of Heating Effects in Nanoscale Devices 纳米器件热效应的自洽模拟
2009 13th International Workshop on Computational Electronics Pub Date : 2009-05-27 DOI: 10.1109/IWCE.2009.5091146
D. Vasileska, S. Goodnick, K. Raleva
{"title":"Self-Consistent Simulation of Heating Effects in Nanoscale Devices","authors":"D. Vasileska, S. Goodnick, K. Raleva","doi":"10.1109/IWCE.2009.5091146","DOIUrl":"https://doi.org/10.1109/IWCE.2009.5091146","url":null,"abstract":"In this paper we present state of the art modeling of coupled electron-phonon transport in nanoscale CMOS SOI devices, in order to elucidate from a microscopic standpoint the role of device dimensions, boundary conditions and various material strategies on self-heating in this technology.","PeriodicalId":443119,"journal":{"name":"2009 13th International Workshop on Computational Electronics","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123640040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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