发布求助
文献互助 智能选刊 最新文献

2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)最新文献

筛选
英文 中文
Novel analog synthesis tool implemented to the Cadence design environment 在Cadence设计环境中实现的新型模拟合成工具
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672330
M. Kubar, J. Jakovenko
{"title":"Novel analog synthesis tool implemented to the Cadence design environment","authors":"M. Kubar, J. Jakovenko","doi":"10.1109/SM2ACD.2010.5672330","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672330","url":null,"abstract":"While analog part of the integrated circuit covers 10% of its area its design takes 90% of the time needed to design the whole circuit. Therefore analog synthesis is very hot topic at present. It can save enormous part of the design time. This paper presents work on novel analog synthesis tool capable of choosing circuit architecture and to size its devices by optimization to meet the design specification. This tool is implemented into Cadence design environment to be easily used by the analog designers. The tool is under construction at present so partial results are presented here.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122156516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Artificial bee Colony optimization based CMOS inverter design considering propagation delays 基于人工蜂群优化的考虑传播延迟CMOS逆变器设计
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672326
Y. Delican, R. Vural, T. Yıldırım
{"title":"Artificial bee Colony optimization based CMOS inverter design considering propagation delays","authors":"Y. Delican, R. Vural, T. Yıldırım","doi":"10.1109/SM2ACD.2010.5672326","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672326","url":null,"abstract":"Artificial bee colony (ABC) algorithm is a new population based metaheuristic approach inspired by intelligent foraging behavior of honeybee swarm. Since microelectronic circuit design deals with highly complicated nonlinear equations, obtaining optimal solution of these equations due to particular constraints in short time and acceptable error is of prime concern. Simpler structure and better result providing in case of parameter growth makes ABC an ideal candidate for optimal design of circuit topologies. In this work, usage of ABC algorithm in electronic circuit design has been investigated. For this purpose, the performance of the algorithm has been tested on the design of a CMOS inverter considering transient performance. The optimizations of CMOS inverter parameters are carried out using ABC in MATLAB and the accuracy of performance prediction is verified by SPICE simulation (0.25-µm). Performance criteria of inverter constitute the constraints of ABC. Obtained results show that ABC is capable of designing the CMOS inverter in a very short time while satisfying all the design considerations with an acceptable error.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129557322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Design of robust electronic circuits for yield optimization 优化成品率的稳健电路设计
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672315
C. Salzig, M. Hauser
{"title":"Design of robust electronic circuits for yield optimization","authors":"C. Salzig, M. Hauser","doi":"10.1109/SM2ACD.2010.5672315","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672315","url":null,"abstract":"With the trend from micro- to nanoelectronics the control of production deviations can not keep pace with the reduction of the absolute sizes of semiconductor devices. This results in an increased number of circuits beyond specification. The presented symbolic methods for reducing behavioral models with parameter variations assist designing and optimizing robust electronic circuits to increase the yield of produced circuits.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132211658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A new DC-temperature model for a diode bolometer based on SOI-pin-diode test structures 基于SOI-pin-diode测试结构的二极管测热计直流温度模型
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672328
P. Kropelnicki, H. Vogt
{"title":"A new DC-temperature model for a diode bolometer based on SOI-pin-diode test structures","authors":"P. Kropelnicki, H. Vogt","doi":"10.1109/SM2ACD.2010.5672328","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672328","url":null,"abstract":"Different models have been proposed for modeling the IV-characteristics of diodes. In this paper we present a simple model, which describes both the IV- and the temperature characteristics of a SOI-pin-diode and can be used for different diodes types. It is well known that the DC-characteristics of a diode can be approximated by the simple Shockley-equation. However, when a more exact modelling of device parameters is needed, for example for a microbolometer based on a diode, deviations from the simple exponential behaviour have to be taken into account. These additional effects usually depend on the operating point of the diode and can be included by allowing the ideality factor to vary with the applied operating voltage.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132532790","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Automatic generation of RF integrated inductors analytical characterization 自动生成射频集成电感分析表征
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672295
P. Pereira, M. Fino, M. Ventim-Neves
{"title":"Automatic generation of RF integrated inductors analytical characterization","authors":"P. Pereira, M. Fino, M. Ventim-Neves","doi":"10.1109/SM2ACD.2010.5672295","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672295","url":null,"abstract":"This paper addresses the automatic generation of RF integrated inductors model. In this work the double p-model is used as a way of characterizing the inductor behaviour over a frequency range beyond the self-resonant value. For the evaluation of the model element values analytical expressions based on technology parameters as well as on the device geometric characteristics are used. The use of a technology-based methodology for the evaluation of the model parameters grants the adaptability of the models generated to any technology. The inductor analytical characterization is integrated into an optimization-based tool for the automatic design of RF integrated inductors. This tool uses a Genetic Algorithm (GA) optimization procedure, where user defined constraints on the design parameters are taken into account. Due to the design constraints nature and topology constraints, discrete variables optimization techniques are used.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"82 14","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113944474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Multi-objective performance optimization of planar inductors 平面电感器的多目标性能优化
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672345
J. Esteban-Muller, R. Gonzalez-Echevarria, C. Sánchez-López, E. Roca, R. Castro-López, F. Fernández, J. López-Villegas, J. Sieiro, N. Vidal
{"title":"Multi-objective performance optimization of planar inductors","authors":"J. Esteban-Muller, R. Gonzalez-Echevarria, C. Sánchez-López, E. Roca, R. Castro-López, F. Fernández, J. López-Villegas, J. Sieiro, N. Vidal","doi":"10.1109/SM2ACD.2010.5672345","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672345","url":null,"abstract":"Inductors play an essential role in the design of RF circuits. The parasitic effects plaguing integrated planar inductors require an accurate modeling and the careful exploration of their performance trade-offs. In this paper, a multi-objective performance modeling technique of planar inductors is presented, that supports both top-down and bottom-up design of RF circuits.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114545020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Systematic modeling and simulation of DLL-based frequency multiplier 基于dll的倍频器系统建模与仿真
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672340
M. Gholami, M. Sharifkhani, A. Ebrahimi, S. Saeedi, M. Atarodi
{"title":"Systematic modeling and simulation of DLL-based frequency multiplier","authors":"M. Gholami, M. Sharifkhani, A. Ebrahimi, S. Saeedi, M. Atarodi","doi":"10.1109/SM2ACD.2010.5672340","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672340","url":null,"abstract":"This paper represents a systematic procedure of simulating charge pump based delay locked loops (DLLs). The presented procedure is based on the systematic modelling of the DLL components in Matlab simulink simulator. The system has been designed for 1Hz input clock signal that by changing the whole system scale, it can be used for every other input frequencies. The simulation results in Matlab and design considerations for DLL based frequency multiplier are presented.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134112316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Optimisation and simulation methodology for passive ADSL splitter design 无源ADSL分路器设计的优化与仿真方法
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672289
D. Duret, L. Gerbaud, F. Wurtz, A. Rezgui, B. Delinchant, B. Cogitore
{"title":"Optimisation and simulation methodology for passive ADSL splitter design","authors":"D. Duret, L. Gerbaud, F. Wurtz, A. Rezgui, B. Delinchant, B. Cogitore","doi":"10.1109/SM2ACD.2010.5672289","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672289","url":null,"abstract":"The constraints to manage in a telecom splitter design are numerous and according to a given splitter structure, the choice became difficult. The paper proposes a software tool allowing the design of such filters. This one carries out the modelling of the electrical circuit configurations, and creates the corresponding computation code, used for simulation or optimisation. The methodology is detailed and applied on an ADSL splitter design.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132849437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Automatic tuning of GPC synthesis parameters based on multi-objective optimization 基于多目标优化的GPC合成参数自动调谐
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672348
Faten. Ben Aicha, F. Bouani, M. Ksouri
{"title":"Automatic tuning of GPC synthesis parameters based on multi-objective optimization","authors":"Faten. Ben Aicha, F. Bouani, M. Ksouri","doi":"10.1109/SM2ACD.2010.5672348","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672348","url":null,"abstract":"In this paper, a strategy for automatic tuning of predictive controller synthesis parameters based on multi-objective optimization (MOO) is proposed. This strategy integrates the genetic algorithm to generate the synthesis parameters (the prediction horizon, the control horizon and the cost weighting factor) making a compromise between closed loop performances (the overshoot, the variance of the control and the settling time). A simulation example is presented to illustrate the performance of this strategy in the on-line adjustment of generalized predictive control parameters.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124812306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Fast mixed-mode PLL simulation using behavioral baseband models of voltage-controlled oscillators and frequency dividers 使用压控振荡器和分频器的行为基带模型的快速混合模式锁相环仿真
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI: 10.1109/SM2ACD.2010.5672294
Ihor Harasymiv, Manfred Dietrich, U. Knochel
{"title":"Fast mixed-mode PLL simulation using behavioral baseband models of voltage-controlled oscillators and frequency dividers","authors":"Ihor Harasymiv, Manfred Dietrich, U. Knochel","doi":"10.1109/SM2ACD.2010.5672294","DOIUrl":"https://doi.org/10.1109/SM2ACD.2010.5672294","url":null,"abstract":"This article presents a new approach to fast mixed-mode simulation of phase-locked loops (PLLs) in time domain using Spice-like simulators and behavioral Verilog-A baseband (BB) models of voltage-controlled oscillators (VCO) and frequency dividers (FD). Other PLL blocks like phase-frequency detectors (PFD), charge pumps (CP), and loop filters (LP) can be transistor level and/or behavioral models. The use of both VCO and FD BB models in mixed-mode test bench allows fast PLL simulation and optimization of modern sophisticated PFD and CP blocks on transistor level with speedups of about 2–3 orders of magnitude.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130407035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信