基于dll的倍频器系统建模与仿真

2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) Pub Date : 2010-12-17 DOI:10.1109/SM2ACD.2010.5672340

M. Gholami, M. Sharifkhani, A. Ebrahimi, S. Saeedi, M. Atarodi

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引用次数: 2

摘要

本文给出了一种基于电荷泵的延迟锁相环的系统模拟方法。在Matlab simulink仿真器中对DLL组件进行系统建模。该系统被设计为1Hz输入时钟信号，通过改变整个系统的比例，它可以用于任何其他输入频率。给出了Matlab仿真结果和基于DLL的倍频器的设计思路。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Systematic modeling and simulation of DLL-based frequency multiplier

This paper represents a systematic procedure of simulating charge pump based delay locked loops (DLLs). The presented procedure is based on the systematic modelling of the DLL components in Matlab simulink simulator. The system has been designed for 1Hz input clock signal that by changing the whole system scale, it can be used for every other input frequencies. The simulation results in Matlab and design considerations for DLL based frequency multiplier are presented.

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2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)

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