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The formation of MoSe2 films during selenization process in CZTSe solar cells CZTSe太阳能电池硒化过程中MoSe2膜的形成
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589329
L. Yao, J. Ao, Jinlian Bi, Shoushuai Gao, Q. He, Zhi-qiang Zhou, Guozhong Sun, Yun Sun, M. Jeng, Liann-Be Chang
{"title":"The formation of MoSe2 films during selenization process in CZTSe solar cells","authors":"L. Yao, J. Ao, Jinlian Bi, Shoushuai Gao, Q. He, Zhi-qiang Zhou, Guozhong Sun, Yun Sun, M. Jeng, Liann-Be Chang","doi":"10.1109/INEC.2016.7589329","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589329","url":null,"abstract":"The formation of MoSe<sub>2</sub> films during selenization process in CZTSe solar cells was investigated in this work It was found that these phases of Cu<sub>2</sub>Se, ZnSe, and Cu<sub>2</sub>SnSe<sub>3</sub> did not react with Mo to form MoSe<sub>2</sub> films. The SnSe<sub>2</sub> vapor will promote the generation of MoSe<sub>2</sub> films. The control of SnSe<sub>2</sub> in the sample will be very important for effectively control the thickness of MoSe<sub>2</sub> films.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124407311","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Research on the electronics unit of digital fluxgate sensor 数字磁通门传感器电子元件的研究
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589257
Menghui Zhi, Yongjian Lv, Lei Ji, Qingyun Ju, Liang Tang, Donghai Qiao
{"title":"Research on the electronics unit of digital fluxgate sensor","authors":"Menghui Zhi, Yongjian Lv, Lei Ji, Qingyun Ju, Liang Tang, Donghai Qiao","doi":"10.1109/INEC.2016.7589257","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589257","url":null,"abstract":"Traditional analog fluxgate sensors have the shortcoming of being disturbed easily by the external environment. To overcome this shortcoming, a digital fluxgate system based on field programmable gate arrays (FPGAs) is described in this paper. The feasibility and accuracy of the system are verified by comparing with the magnetic field data of the geomagnetic stations in Ming Dynasty Tombs. Further experimental results show that the resolution comes to about 0.2nT with a linear dynamic range of about ±65000nT, which is better than the average level of InT in the domestic. Comparing with the analog circuit design of the fluxgate sensor, the digital electronics unit design in this paper has realized a more accurate and stable fluxgate sensor system with a larger measurement range in the three-axis directions, which fully meets the requirements of the magnetic field surveying.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116962849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A physics-based compact model for a-InGaZnO thin-film transistors 基于物理的A - ingazno薄膜晶体管紧凑模型
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589263
Fei Yu, Xiaoyu Ma, Junkai Huang, W. Deng
{"title":"A physics-based compact model for a-InGaZnO thin-film transistors","authors":"Fei Yu, Xiaoyu Ma, Junkai Huang, W. Deng","doi":"10.1109/INEC.2016.7589263","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589263","url":null,"abstract":"A compact model for amorphous InGaZnO (a-InGaZnO) thin-film transistors (TFTs) with the tail and deep trap densities of states is proposed. Based on the surface potential, an explicit and closed-form expression of the drain current considering exponential tail and deep trap charges is developed. The surface potential model is achieved analytically without the process of amendment and suitable for circuit simulations. Furthermore, our models are verified by numerical results and experimental data for the cases of the different operational voltages.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121212174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
3-D simulation of charge collection in double-gate MOSFET under low-energy proton irradiation 低能质子辐照下双栅MOSFET电荷收集的三维模拟
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589258
Shaoan Yan, Wanli Zhang, Gang Li, Yihna Chen, M. Tang, Zheng Li
{"title":"3-D simulation of charge collection in double-gate MOSFET under low-energy proton irradiation","authors":"Shaoan Yan, Wanli Zhang, Gang Li, Yihna Chen, M. Tang, Zheng Li","doi":"10.1109/INEC.2016.7589258","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589258","url":null,"abstract":"The charge collection in 20 nm double-gate MOSFET (DG MOSFET) submitted to low-energy Proton irradiation are investigated in this paper. The drain current transient and charge collection with different doping levels are simulated. Different strike radii and locations are also discussed in the paper.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127053643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhanced recrystallization of ultra-thin α-silicon film by 2-D confined lattice regrowth 二维约束晶格再生增强超薄α-硅薄膜的再结晶
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589305
Hao Zhang, Ming Li, Gong Chen, Yuancheng Yang, Ru Huang
{"title":"Enhanced recrystallization of ultra-thin α-silicon film by 2-D confined lattice regrowth","authors":"Hao Zhang, Ming Li, Gong Chen, Yuancheng Yang, Ru Huang","doi":"10.1109/INEC.2016.7589305","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589305","url":null,"abstract":"In this paper, the improved recrystallization of ultra-thin amorphous silicon (α-Si) film was realized by two-dimensionally confined lattice regrowth with normal rapid thermal annealing process. By experimental investigation, the α-Si films with thickness of 400 Å were found to be recrystallized even at 850°C for only 35s rapid thermal annealing (RTA). With capped Si3N4 layer, the lattice regrowth was confined more strictly to along the film plane so that smoother and higher-quality polycrystalline silicon film was obtained which is suitable for future monolithic three dimensional (3D) stacked integration processes.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"09 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127202188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Hardware-efficient learning with feedforward inhibition 具有前馈抑制的硬件高效学习
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589353
Zihan Xu, Pai-Yu Chen, Jae-sun Seo, Shimeng Yu, Yu Cao
{"title":"Hardware-efficient learning with feedforward inhibition","authors":"Zihan Xu, Pai-Yu Chen, Jae-sun Seo, Shimeng Yu, Yu Cao","doi":"10.1109/INEC.2016.7589353","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589353","url":null,"abstract":"On-chip learning and classification have a broad impact on many applications. Yet their hardware implementation is still limited by the scale of computation, as well as practical issues of device fabrication, variability and reliability. Inspired by micro neural-circuits in the cortical system, this work develops a novel solution that efficiently reduces the network size and improves the learning accuracy. The building block is the motif of feedforward inhibition that effectively separates main features and the residual in sparse feature extraction. Other learning rules follow the spike-rate-dependent-plasticity (SRDP). As demonstrated in handwriting recognition, such a bio-plausible solution is able to achieve >95% accuracy, comparable to the sparse coding algorithms; in addition, SRDP, instead of gradient based back propagation, is able to save the computation time by >50X. The utilization of the inhibition motif reduces the network size by >3X at the same accuracy, illustrating its potential in hardware efficiency.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124896448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Simulation of high-Q thin film bulk acoustic wave resonator for chip-scale atomic clock 芯片级原子钟用高q薄膜体声波谐振器的仿真
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589256
Z. Zhang, Menghui Zhi, Qingyun Ju, Liang Tang, Donghai Qiao
{"title":"Simulation of high-Q thin film bulk acoustic wave resonator for chip-scale atomic clock","authors":"Z. Zhang, Menghui Zhi, Qingyun Ju, Liang Tang, Donghai Qiao","doi":"10.1109/INEC.2016.7589256","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589256","url":null,"abstract":"Thin Film hulk acoustic wave resonators (FBARs) with relatively high Q-factor are considered good candidates to be used in the radio frequency module of chip-scale atomic clocks. In previous works, SiO2 thin film was introduced into the FBARs between the top electrode and piezoelectric layer which resulted in a good improvement in Q-factor about 350 after parameters optimization. Based on the same method herein, the SiO2 thin film is introduced into the FBARs between the piezoelectric layer and bottom electrode. The parameters optimization results show that it can also improve the Q-factor. The FBAR device resonating at 4.6GHz with Q-factor 754 is achieved and the thickness of the SiO2 thin film and piezoelectric layer of the FBAR are 0.4um and 0.63um respectively. The optimized Q-factor of the FBAR device in this work is about 127 higher than that in the previous works, and it is expected to be used in chip-scale cesium atomic clocks.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126117868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis of GaSb-InAs Gate all around (GAA) p-i-n tunnel FET (TFET) for application as a bio-sensor GaSb-InAs全环栅(GAA) p-i-n隧道场效应晶体管(TFET)作为生物传感器的应用分析
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589324
Ajay, Mridula Gupta, R. Narang, M. Saxena
{"title":"Analysis of GaSb-InAs Gate all around (GAA) p-i-n tunnel FET (TFET) for application as a bio-sensor","authors":"Ajay, Mridula Gupta, R. Narang, M. Saxena","doi":"10.1109/INEC.2016.7589324","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589324","url":null,"abstract":"The paper investigates the role of hetero Junction (HJ) GAA p-i-n TFET architecture for biosensing applications. The device offers better sensitivity and has been modeled in terms of various parameters such as surface potential, threshold voltage and drain current. Analytical modeling scheme is based the exact resultant solution of two-dimensional Poisson equation.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115112360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Designer Ge quantum-dot phototransistors for highly-integrated, broadband optical interconnects 设计了用于高集成度、宽带光互连的量子点光电晶体管
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589425
M. Kuo, C. Chien, P. Liao, W. Lai, Pei-Wen Li
{"title":"Designer Ge quantum-dot phototransistors for highly-integrated, broadband optical interconnects","authors":"M. Kuo, C. Chien, P. Liao, W. Lai, Pei-Wen Li","doi":"10.1109/INEC.2016.7589425","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589425","url":null,"abstract":"We report high-responsivity Ge quantum dots (QDs) MOS phototransistors as on-chip transducers for highly-integrated, broadband Si-based optical interconnects. Self-organized heterostructure of Ge-QD/SiO2/Si-channel is fabricated in a single step through selective oxidation of SiGe nano-pillars over a Si3N4 buffer layer on Si substrates. Dark current densities (10-7A/mm2), photocurrent-to-dark current ratio (~ 107) and photoresponsivities (>10 A/W), external quantum efficiency (~240%), and response time (1.4ns) are measured on the Ge-QD phototransistors under 850 nm illumination. Detection wavelength is tunable from near infrared to near ultraviolet by reducing the QD size from 90 to 7 nm, and the optimal photoresponsivity is tailored by the QD size and effective thickness of gate dielectrics.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115195392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A bandgap reference in 65nm CMOS 在65nm CMOS带隙参考
2016 IEEE International Nanoelectronics Conference (INEC) Pub Date : 2016-05-09 DOI: 10.1109/INEC.2016.7589270
Zhang Jun-an, Li Guang-jun, Yan Bo, L. Pu, Yang Yu-jun, Zhang Rui-tao, Li Xi
{"title":"A bandgap reference in 65nm CMOS","authors":"Zhang Jun-an, Li Guang-jun, Yan Bo, L. Pu, Yang Yu-jun, Zhang Rui-tao, Li Xi","doi":"10.1109/INEC.2016.7589270","DOIUrl":"https://doi.org/10.1109/INEC.2016.7589270","url":null,"abstract":"A bandgap reference circuit with voltage and current output is presented. Operational transconductance amplifier(OTA) have been used for a higher DC power supply rejection rate(PSRR) under small gate length of MOSfet. Both telescopic and folded OTA and low threshold voltage MOSfet have been used to ensure the circuit at suitable operation points under every PVT(process, source voltage and temperature) corner. Two opposite temperature coefficient resistors have been connected in series to obtain a temperature independent resistor for voltage reference's generation. This bandgap reference is implemented in a 65nm CMOS technology, occupies 0.75mm×0.67mm including bond pads, Measured results show that this circuit can operate at supply voltage from 1.1V to 1.3V, and the temperature coefficient of voltage output is 30.9ppm/oC with 61dB PSRR (DC, 25oC), and the temperature coefficient of current output is 51.6ppm/oC with 69dB PSRR (DC, 25 oC), among -55oC~125oC without any trimming or calibration.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115986322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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