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Ultrahigh power graphene based supercapacitor 超高功率石墨烯基超级电容器
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236797
Binghe Xie, Peichao Zou, Cheng Yang
{"title":"Ultrahigh power graphene based supercapacitor","authors":"Binghe Xie, Peichao Zou, Cheng Yang","doi":"10.1109/ICEPT.2015.7236797","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236797","url":null,"abstract":"Supercapacitor as a type of new energy storage device has important applications in the development of smart electronics and vehicles, which can provide a high current density to drive the devices. Recently, although graphene has been considered as a very promising electrode material for supercapacitors, the poor control of the dispersion of graphene and the limited way of electrode preparation process severely hinder its power performance. Here, we report a supercapacitor technology with ultrahigh power combining the electrochemically reduced graphene oxide deposited on nickel nanocone array with printed ethylene vinyl acetate cofferdams. The supercapacitor showed excellent rate performance, ultrahigh power density (1230 mWh/cm3) and high ionic mobility, especially when compared to those with separator. In light of the simple process (electrochemical-deposition and stencil printing, etc.), this technology can meet the demand of applications with high power density and inspire the development of other energy storages to achieve better performance.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126392739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A wet process to form silicon oxide thin layer for through silicon via application 一种湿法工艺，形成氧化硅薄层，通过应用
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236559
Zhigang Huang, Junhong Zhang, Ming Li
{"title":"A wet process to form silicon oxide thin layer for through silicon via application","authors":"Zhigang Huang, Junhong Zhang, Ming Li","doi":"10.1109/ICEPT.2015.7236559","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236559","url":null,"abstract":"In ultra large scale integration (ULSI) system, miniaturization of CMOS devices is becoming more and more difficult and costly, thus new fields for improving ULSI design and manufacturing are actively developed. One of the most promising ways is the three-dimensional integration of stacked chips (3D packaging). Through silicon via (TSV) technology is of significance for 3D packaging which acts as connection between chips and wafers. An insulating layer is elaborated between conductor and silicon to prevent shortcut and atom diffusion in TSV. In this paper, a wet process method to form silica layer is developed based on porous silicon (PS) and anodization. The thickness of the silica layer is well controlled by experiment factors. The morphology silicon oxide layer formed on flat silicon substrates are characterized. Comparing with traditional dry process such as thermal oxidation and chemical vapor deposition, this wet process has less requirement for equipment and can avoid some shortages of those dry processes in TSV application.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116223470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A circularly polarized antenna based on EMSIW sub-array with high front-to-back ratio 基于高前后比EMSIW子阵的圆极化天线
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236839
Ya-hua Ran, Yang Peng, Jia-wei Li
{"title":"A circularly polarized antenna based on EMSIW sub-array with high front-to-back ratio","authors":"Ya-hua Ran, Yang Peng, Jia-wei Li","doi":"10.1109/ICEPT.2015.7236839","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236839","url":null,"abstract":"A high front-to-back ratio circularly polarized planar antenna is presented in this communication based on a quarter-mode substrate integrated waveguide sub-array. It is composed of three parts: an eighth-mode substrate integrated waveguide (EMSIW) sub-array, four coaxial cables which are used to connect the probe-fed sub-array and the corporate feed network, and the feed network of which composed three Wilkinson power dividers is applied to feed the array. The measured front to back radiation ratio and the measured antenna gain for right-hand circular polarization (RHCP) are 28.6 dB and 6.61 dBi at 5.2 GHz, respectively. The measured 10-dB return loss and 3-dB axial ratio bandwidths at the center frequency 5.2 GHz are 21.53% and 10.96%, respectively.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123839460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A novel bump-CPW-bump structure for interconnection/transition of RF MEMS packaging 一种用于RF MEMS封装互连/过渡的新型bump-CPW-bump结构
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236712
Ningjie Li, Yuluan Wu, Lei Chen, Baozhen Wu, Cheng Zhao, Y. Wang, Yue Sun
{"title":"A novel bump-CPW-bump structure for interconnection/transition of RF MEMS packaging","authors":"Ningjie Li, Yuluan Wu, Lei Chen, Baozhen Wu, Cheng Zhao, Y. Wang, Yue Sun","doi":"10.1109/ICEPT.2015.7236712","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236712","url":null,"abstract":"A novel 1-level interconnection/transition method for radio frequency micro-electronic-mechanic system (RF MEMS) devices is proposed in this paper. Using bump-CPW-bump structure which is composed of a chip substrate, a coplanar waveguide (CPW) transmission line fabricated on the substrate and a group of metal bumps set on the ends of the CPW line, this method combines the advantages of both flip-chip and through-silicon via (TSV) techniques. The results of the finite element method (FEM) analysis show that this interconnection/ transition structure has good characteristics of return loss and insertion loss over a broad frequency range compared with both TSV and wire-bonding structures.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125657658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Development of TSV-based inductors in power electronics packaging 电力电子封装中基于tsv电感器的研制
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236663
Saikat Mondal, J. Gamboa, Bruce C. Kim
{"title":"Development of TSV-based inductors in power electronics packaging","authors":"Saikat Mondal, J. Gamboa, Bruce C. Kim","doi":"10.1109/ICEPT.2015.7236663","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236663","url":null,"abstract":"This paper describes the design of a Through-Silicon-Via (TSV) based high-density 3D toroidal type inductor with two different ferromagnetic materials (nickel and Ni-Zn-ferrite) in the core. 3D inductors with different structural dimensions are simulated and compared.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"40 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114022713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Improving the thermal and mechanical properties of silicon resin with functionalized graphene for electronic packaging 用功能化石墨烯改善电子封装用硅树脂的热性能和力学性能
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236537
Weijian Xiong, A. Zheng, Si Yu, Dayong Gui, Wei Chen, Shibin Li, Jianhong Liu
{"title":"Improving the thermal and mechanical properties of silicon resin with functionalized graphene for electronic packaging","authors":"Weijian Xiong, A. Zheng, Si Yu, Dayong Gui, Wei Chen, Shibin Li, Jianhong Liu","doi":"10.1109/ICEPT.2015.7236537","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236537","url":null,"abstract":"A liquid crystalline molecule-4'-allyloxy-biphenyl-4-ol (AOBPO) was synthesized and used to functionalize graphene. Then, the functionalized graphene were mixed with silicone resin as fillers to fabricate silicon resin nanocomposites. The resulting liquid crystalline molecule functionalized graphene sheets were characterized by fluorescence spectroscopy, thermal gravimetric analysis (TGA), Fourier transform infrared spectroscopy (FT-IR) and X-ray diffraction (XRD). The mechanical and thermal properties of silicon resin nanocomposites were measured and the testing results indicate that, both the mechanical strength and thermal conductivity of AOBPO-graphene/silicon resin nanocomposites (with filler mass fraction of 0.5%, 1.0% and 2.0%) gain great increase. When the mass fraction of AOBPO-GNS was 1.0%, the tensile strength of silicon resin nanocomposites came up to 5.455 MPa and increased by 430% over neat silicon resin; the highest value for the thermal conductivity of AOBPO-GNS nanocomposite was obtained at 2 wt%, and it comes up to 0.785 W/(m·K), which is more than 10 times over that of the neat silicon resin.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132616270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and properties of Sn-Bi-In low-temperature solders Sn-Bi-In低温焊料的设计与性能
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236635
Qin Li, Y. Lei, Jian Lin, Sai Yang
{"title":"Design and properties of Sn-Bi-In low-temperature solders","authors":"Qin Li, Y. Lei, Jian Lin, Sai Yang","doi":"10.1109/ICEPT.2015.7236635","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236635","url":null,"abstract":"Sn-Bi-In low-temperature solder was fabricated by adding In element to tin-bismuth series solder. In this paper, to study the solders with melting temperature around 110°C for replacing the toxic 26Sn-54Bi-20Cd alloy, the microstructures, thermal properties, wettabilities and microhardness of solders were studied respectively. The results show that the microstructure of Sn-Bi-In solders is composed of BiIn2 matrix, InSn4 and Bi phases, and transformed to Sn-rich matrix, Bi and InBi phases with the In content reduction. In addition, the melting temperatures of solders with 12wt% In content are around 101.5-103.1°C. Wettability is affected by compositions and the increase of Sn content to 50wt% can promote the spreading of solders. Microhardness can be increased by Bi addition and In reduction. Based on these properties study, 50Sn-38Bi-12In solder is comparable to 26Sn-54Bi-20Cd solder, and could be used in the special low-temperature welding.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133857893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Ink-jet printed high conductive silver traces on polymer substrates sintered at room temperature by a camera flash lamp 用相机闪光灯在室温下烧结的聚合物基板上喷墨印刷高导电性银迹
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236668
X. Gu, K. Yung
{"title":"Ink-jet printed high conductive silver traces on polymer substrates sintered at room temperature by a camera flash lamp","authors":"X. Gu, K. Yung","doi":"10.1109/ICEPT.2015.7236668","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236668","url":null,"abstract":"A simple and facile camera flash sintering method has been developed to sinter the ink-jet printed silver nanoparticle traces at room temperature to form conductive circuit on flexible polymer substrates. The electrical resistivity of silver traces sintered by two times of camera flash can be decreased to 8.4 μΩ cm, which is only about 1/3 that of the silver tracks thermally sintered at 150 °C for 80min. As camera flash sintering is fast, simple and cost-effective, it is promising to be widely used for nanoink-jet printed electronics. Furthermore, this method is expected be readily generalized to prepare other types of metal lines on various substrates such as glass and polymer owing to the room temperature process. The sintering mechanism is also investigated via in-situ recording temperature of the Ag nanoparticles based track during the flash sintering, which confirms the enhanced photothermal effect of nanostructures.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115715989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Strength correlation of power chips by finite element method 基于有限元法的功率芯片强度关联
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236585
Yumin Liu, Changsun Yun, Y. Liu
{"title":"Strength correlation of power chips by finite element method","authors":"Yumin Liu, Changsun Yun, Y. Liu","doi":"10.1109/ICEPT.2015.7236585","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236585","url":null,"abstract":"The ultimate tensile strength of silicon chips can be measured by the three-point bending test. During the test, the breaking load is recorded. The tensile strength of silicon chips can be calculated through the formula between stress and breaking load derived from the beam bending theory. The tests are characterized at die level, which makes it convenient to prepare for the test specimen. However, the dimension of silicon chips may not fall in the range of required geometry, and testing for bigger chip size may have more uncertainty. In this case, the calculated data may over-estimate or under-estimate the strength values. FE modeling technique is used to do correlation with the test data. The 3-D FE model of the silicon chip is created to simulate the three-point bending test. The breaking force taken from the experimental results is applied as the loading condition. The max tensile stress from the simulation results is taken as the tensile strength of the silicon chips. The study of several cases of power chips with different size and thickness is conducted by the experimental three-point bending tests and FE modeling. It is found that in some cases the test results with beam theory and FEA simulation results agree quite well, but in other cases, there is some gap, so correlation of the testing data by the beam theory and by FE modeling is necessary.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115013623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Failure mode analysis for the solder joints for the flip-chip light emitting diodes 倒装式发光二极管焊点失效模式分析
2015 16th International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2015-09-03 DOI: 10.1109/ICEPT.2015.7236752
Yang Liu, F. Sun, Hao Zhang, Tong Xin, Guoqi Zhang
{"title":"Failure mode analysis for the solder joints for the flip-chip light emitting diodes","authors":"Yang Liu, F. Sun, Hao Zhang, Tong Xin, Guoqi Zhang","doi":"10.1109/ICEPT.2015.7236752","DOIUrl":"https://doi.org/10.1109/ICEPT.2015.7236752","url":null,"abstract":"This paper investigated the shear performance and failure modes of the flip-chip LED packages by soldering method. The results of the experimental tests demonstrate that the solder joints on the ENIG surface finish show higher bonding strength than that on the Cu-OSP surface finish after reflow and isothermal aging. For the solder joints for the anodes on ENIG and Cu-OSP surface finishes, the LED chip and the solder interface near the LED chip are the weakest part. In contrast, the solder bulk showed the poorest strength and become the failure position for the solder joints for the cathodes. The Au layers at the diodes dissolved into the molten solder during reflow and led to the broken of the insulation layer and the interface between the insulation layer and the solder layer are prone to become the crack initiation position. An Au-rich layer can be observed near the cathode/solder layer interface after reflow. After long time aging, the Au-rich layer transformed into an interface.","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"208 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124670718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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