{"title":"Investigation into the performance of turbulence models for fluid flow and heat transfer phenomena in electronic applications","authors":"K. Dhinsa, C. Bailey, K. Pericleous","doi":"10.1109/TCAPT.2005.859758","DOIUrl":"https://doi.org/10.1109/TCAPT.2005.859758","url":null,"abstract":"Computational Fluid Dynamics (CFD) is gradually becoming a powerful and almost essential tool for the design, development and optimization of engineering applications. However the mathematical modelling of the erratic turbulent motion remains the key issue when tackling such flow phenomena. The reliability of CFD analysis depends heavily on the turbulence model employed together with the wall functions implemented. In order to resolve the abrupt changes in the turbulent energy and other parameters situated at near wall regions a particularly fine mesh is necessary which inevitably increases the computer storage and run-time requirements. Turbulence modelling can be considered to be one of the three key elements in CFD. Precise mathematical theories have evolved for the other two key elements, grid generation and algorithm development. The principal objective of turbulence modelling is to enhance computational procedures of efficient accuracy to reproduce the main structures of three dimensional fluid flows. The flow within an electronic system can be characterized as being in a transitional state due to the low velocities and relatively small dimensions encountered. This paper presents simulated CFD results for an investigation into the predictive capability of turbulence models when considering both fluid flow and heat transfer phenomena. Also a new two-layer hybrid k/spl epsiv//kl turbulence model for electronic application areas will be presented which holds the advantages of being cheap in terms of the computational mesh required and is also economical with regards to run-time.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127739162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Electro-kinetic microchannel cooling system for desktop computers","authors":"P. Zhou, J. Hom, G. Upadhya, K. Goodson, M. Munch","doi":"10.1109/STHERM.2004.1291297","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291297","url":null,"abstract":"The requirements for thermal management in high performance desktop computers are rapidly outpacing the capabilities of the best commercially available active and passive air cooling solutions. The problem lies in three compounding trends: a) higher average chip power density, b) higher peak power densities in chip hotspots, and c) more stringent system boundary conditions. Pumped liquid cooling system is a promising alternative to address these thermal management challenges. We present here an electro-kinetic microchannel cooling system for desktop computers that can handle average power density greater than 150 W/cm/sup 2/ and hotspots with peak power densities on the order of 500 W/cm/sup 2/ and above. The cooling system features a microchannel heat exchanger for high heat flux removal capability, an electrokinetic pump for delivering fluid at the required flow rate and pressure drop, and a liquid-air heat exchanger. The microchannel heat exchanger is well suited for hotspot cooling on microprocessors, and the solid-state electro-kinetic pump is silent, compact, and promises high reliability through its lack of moving parts. This manuscript describes simulations and experiments on a system prototype, which, when fully integrated, fits well within the boundary conditions required for high performance desktop computers.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115682374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Wuttijumnong, T. Nguyen, M. Mochizuki, K. Mashiko, Y. Saito
{"title":"Overview latest technologies using heat pipe and vapor chamber for cooling of high heat generation notebook computer","authors":"V. Wuttijumnong, T. Nguyen, M. Mochizuki, K. Mashiko, Y. Saito","doi":"10.1109/STHERM.2004.1291327","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291327","url":null,"abstract":"The trend of the processor performance and heat dissipation increased significant every year. In the year 2000, the clock speed of processor used in notebook is marginal 1GHz and heat dissipation marginal 20 W, but in the current year 2003 the processor's clock speed is higher than 2 GHz and heat dissipation higher than 50 W and approaching 100 W by year 2004. Heat dissipation increased but in contrary the size of the processor reduced and thus the heat flux is critically high. The heat flux is about 10-15 W/cm/sup 2/ in the year 2000 and could reach over 100 W/cm/sup 2/ by year 2004. The purpose of this paper is to provide overview of various cooling solutions using heat pipe and vapor chamber for cooling high power processors in a confined space of the notebook.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125746299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Tounsi, J. Dorkel, P. Dupuy, X. Chauffleur, J. Fradin, A. Feybesse, F. Chaunut
{"title":"New method for electrothermal simulations: HDTMOS in automotive applications","authors":"P. Tounsi, J. Dorkel, P. Dupuy, X. Chauffleur, J. Fradin, A. Feybesse, F. Chaunut","doi":"10.1109/STHERM.2004.1291310","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291310","url":null,"abstract":"In this paper, an original method for electrothermal simulation is presented. This method is intended for automotive applications where an HDTMOS/spl trade/-driven electronic actuator operates at a high switching frequency (20kHz). First, a SPICE electrical model of the switching cell is developed. The temperature-dependent intrinsic electrical parameters are extracted with thermally-controlled electrical I-V measurements. Power dissipation is calculated from the duty cycle, /spl delta/, load current, I/sub M/, and the junction temperature T. The results, which are the power dissipation values for all combinations of (/spl delta/,I/sub M/,T), are used to fill in a look-up table. Then the HDTMOS structure (chip, packaging and heatsink) is described with the help of the REBECA-3D software package, and the electrothermal balance is found for given waveforms of current and duty cycle. The originality of this method lies in the effective way of processing the great difference of thermal and electrical time-constants in the procedure of communication between the two simulation programs.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131012148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yunhyeok Im, Heung-Kyu Kwon, Senyun Kim, Tongsuk Kim, T. Cho, Seyong Oh
{"title":"Methodology for accurate junction temperature estimation of SIP(System in Package)","authors":"Yunhyeok Im, Heung-Kyu Kwon, Senyun Kim, Tongsuk Kim, T. Cho, Seyong Oh","doi":"10.1109/STHERM.2004.1291311","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291311","url":null,"abstract":"As the mobile products have been developed, lots of devices of various functions should be packaged into the limited space. Therefore, as many as possible packaging multi-dies are needed in a small package. Compared with discrete packages, System in Package (SIP) can provide better solutions for power saving, EMI reduction, max frequency upgrade in spite of its higher cost, low test yield, poor quality assurance, and more complicated manufacturing process. But, having many chips in one package has raised concerns related to heat dissipation, which has become one of the most serious problems in the design of SIP. Accordingly, a method to obtain T/sub j/ for each chip from the power inputs is needed. This is quite significant at the SIP promotion and design stage, though the temperature value would be changed by system environment. In this paper, a new approach to determine the junction temperatures of the SIP is proposed. The average temperature of the chips was calculated by RSM, and the temperature difference from the average temperature was calculated by linear superposition. The \"hot spot factor\", which can reflects the effect of chip size and hot spot on the chip was newly proposed. Using this approach, one can calculate device junction temperatures simply and accurately.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134645315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Thermal characterization of a fan-sink for an AGP card","authors":"X. Sun, A. Panigrahy","doi":"10.1109/STHERM.2004.1291313","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291313","url":null,"abstract":"Thermal management of graphics cards in personal computers has become important with the increasing popularity of video intensive applications and games. This paper presents a conceptual thermal design for the Graphics Processing Unit (GPU) of the Accelerated Graphics Port (AGP) card. Experiments, with the help by computational fluid dynamics (CFD) simulations, are used to produce and prove the concept design. The results of CFD simulations were found to be within +-10% error of the test data.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125875295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Thermal characterization of eutectic alloy thermal interface materials with void-like inclusions","authors":"Xuejiao Hu, Linan Jiang, K. Goodson","doi":"10.1109/STHERM.2004.1291308","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291308","url":null,"abstract":"Void formation and growth is a major problem for solder interface materials, because they impede heat conduction from the silicon die to heat spreader/heat sink in semiconductor electronic devices. This work uses infrared microscopy to measure temperature distributions on the interfacial layer through the silicon die. Hot spots, with a 15 /spl deg/C temperature rise above average die temperature, are found right on top of void-like inclusions at a device power density above 50 W/cm/sup 2/. The technique presented in the manuscript, with a theoretical spatial resolution of 3-5/spl mu/m, is promising for thermal characterization of voids in interface solder layers.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"42 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130110511","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. J. Chang, Y. Chen, C.A. Lee, Y. Wang, Y.C. Chen, C.H. Wang
{"title":"Improving temperature control of laser module using fuzzy logic theory","authors":"Y. J. Chang, Y. Chen, C.A. Lee, Y. Wang, Y.C. Chen, C.H. Wang","doi":"10.1109/STHERM.2004.1291324","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291324","url":null,"abstract":"This study used fuzzy logic theory to design a temperature controller, which was used for a butterfly laser module. Experimental results showed that shorter settling time and less steady state error can be achieved compared with a commercial PID controller. And no overshoot was observed in the control process. In addition, response time to achieve stable temperature was faster and more accurate temperature control can be achieved. This indicated the performance of laser module could be enhanced and reliability could be increased as using fuzzy logic controller on temperature control of laser module.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121323447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Weiss, E. Thomas, A. Dairo, B. Rugg, M. Ries, R. Stofflet
{"title":"Generation of subassembly compact half models through experiment and modeling for hard drive thermal characterization","authors":"J. Weiss, E. Thomas, A. Dairo, B. Rugg, M. Ries, R. Stofflet","doi":"10.1109/STHERM.2004.1291333","DOIUrl":"https://doi.org/10.1109/STHERM.2004.1291333","url":null,"abstract":"The hard disk drive (HD) is a type of electronic subassembly that has significant potential for ease of thermal management through the supply chain (from IC provider to ultimate system designer) given the appropriate temperature reference points within the assembly. The challenge lies with understanding and quantifying the nature of the coupled heating of the entire subassembly in order to manage even a single device. Often the reality of fast turn measurements for an IC vendor on a prototype subassembly will not allow the luxury of an accurate worst-case set of power dissipation values for a laboratory data point. Also a measurement-based full compact model of the subassembly including all coupled heating terms may not be achievable due to the constraints of laboratory measurement time or the capability of the subassembly to be powered into different modes which allow for sufficient linear independence for such a formal treatment. In specific situations where the temperature of one particular device is of primary concern, a much-reduced \"compact half model\" (CHM) of the subassembly may be sufficient for the solution of the critical junction temperature. Such a model consists of only a single self-heating and single coupled heated term. While this model would necessarily have significantly less information than a formal compact model, the accuracy for many geometries may be sufficient for subassembly thermal performance assessment, package selection and roadmapping exercises. Limited measurement data sets will be considered as well as the role of choice of reference temperature from the point of view of model generation and ease of thermal management along the supply chain. The principle goal is the identification of the most straightforward method of a single device-in-subassembly performance characterization through prototype measurements.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122859061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}