Thermal characterization of eutectic alloy thermal interface materials with void-like inclusions

Abstract

Void formation and growth is a major problem for solder interface materials, because they impede heat conduction from the silicon die to heat spreader/heat sink in semiconductor electronic devices. This work uses infrared microscopy to measure temperature distributions on the interfacial layer through the silicon die. Hot spots, with a 15 /spl deg/C temperature rise above average die temperature, are found right on top of void-like inclusions at a device power density above 50 W/cm/sup 2/. The technique presented in the manuscript, with a theoretical spatial resolution of 3-5/spl mu/m, is promising for thermal characterization of voids in interface solder layers.