{"title":"含孔洞样夹杂的共晶合金热界面材料的热特性","authors":"Xuejiao Hu, Linan Jiang, K. Goodson","doi":"10.1109/STHERM.2004.1291308","DOIUrl":null,"url":null,"abstract":"Void formation and growth is a major problem for solder interface materials, because they impede heat conduction from the silicon die to heat spreader/heat sink in semiconductor electronic devices. This work uses infrared microscopy to measure temperature distributions on the interfacial layer through the silicon die. Hot spots, with a 15 /spl deg/C temperature rise above average die temperature, are found right on top of void-like inclusions at a device power density above 50 W/cm/sup 2/. The technique presented in the manuscript, with a theoretical spatial resolution of 3-5/spl mu/m, is promising for thermal characterization of voids in interface solder layers.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"42 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":"{\"title\":\"Thermal characterization of eutectic alloy thermal interface materials with void-like inclusions\",\"authors\":\"Xuejiao Hu, Linan Jiang, K. Goodson\",\"doi\":\"10.1109/STHERM.2004.1291308\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Void formation and growth is a major problem for solder interface materials, because they impede heat conduction from the silicon die to heat spreader/heat sink in semiconductor electronic devices. This work uses infrared microscopy to measure temperature distributions on the interfacial layer through the silicon die. Hot spots, with a 15 /spl deg/C temperature rise above average die temperature, are found right on top of void-like inclusions at a device power density above 50 W/cm/sup 2/. The technique presented in the manuscript, with a theoretical spatial resolution of 3-5/spl mu/m, is promising for thermal characterization of voids in interface solder layers.\",\"PeriodicalId\":409730,\"journal\":{\"name\":\"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)\",\"volume\":\"42 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-03-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"23\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/STHERM.2004.1291308\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/STHERM.2004.1291308","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Thermal characterization of eutectic alloy thermal interface materials with void-like inclusions
Void formation and growth is a major problem for solder interface materials, because they impede heat conduction from the silicon die to heat spreader/heat sink in semiconductor electronic devices. This work uses infrared microscopy to measure temperature distributions on the interfacial layer through the silicon die. Hot spots, with a 15 /spl deg/C temperature rise above average die temperature, are found right on top of void-like inclusions at a device power density above 50 W/cm/sup 2/. The technique presented in the manuscript, with a theoretical spatial resolution of 3-5/spl mu/m, is promising for thermal characterization of voids in interface solder layers.