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2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)最新文献

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Ultra low power RF cross-coupled VCO design in the subthreshold regime with high immunity to PVT variations in 130nm CMOS technology 超低功耗射频交叉耦合压控振荡器设计在亚阈值范围内，具有高抗PVT变化的130nm CMOS技术
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182034
I. Ghorbel, F. Haddad, W. Rahajandraibe
{"title":"Ultra low power RF cross-coupled VCO design in the subthreshold regime with high immunity to PVT variations in 130nm CMOS technology","authors":"I. Ghorbel, F. Haddad, W. Rahajandraibe","doi":"10.1109/NEWCAS.2015.7182034","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182034","url":null,"abstract":"This paper presents a novel design and an optimization methodology of an ultra-low power and low phase noise RF voltage controlled oscillator (VCO). This VCO is based on a PMOS-NMOS cross-coupled topology operating in the subthreshold region. An adaptive body biasing technique is presented in this circuit leading to a high immunity to PVT (P=Process, V=Voltage, and T=Temperature) variations. The VCO, implemented in 130nm CMOS technology, consumes only 63 μW under 0.6 V. The obtained tuning range is about 7.2% from 2.32 GHz to 2.495 GHz; therefore, it can address many wireless communication standards such as Wi-Fi, ANT, ZigBee, IEEE 802.15.4, 6LoWPAN, and Bluetooth.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127677827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Bandwidth enhancement of planar EBG structure using dissipative edge termination 利用耗散边缘终端增强平面EBG结构的带宽
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182120
A. Sadr, N. Masoumi, M. Sharifkhani
{"title":"Bandwidth enhancement of planar EBG structure using dissipative edge termination","authors":"A. Sadr, N. Masoumi, M. Sharifkhani","doi":"10.1109/NEWCAS.2015.7182120","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182120","url":null,"abstract":"In this paper, the bandwidth enhancement of planar type electromagnetic bandgap (EBG) structure using dissipative edge termination technique is investigated. Two termination schemes are presented; first with the termination elements along edges of every single EBG patches and second with termination along edges of the whole power plane. In the first case, simulations show that, both lower and upper cutoff frequency is improved for wideband suppression of simultaneous switching noise (SSN). For the second one, lower cutoff frequency is shifted downward from 800MHz of common planar EBG structure to 13MHz. which results in relative bandwidth of 63% higher than the commonly used EBGs. For fast simulation and validation of full-wave simulation, the circuit model of these structures is developed and simulation results are also presented.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121181242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Integrated test concepts for in-situ millimeter-wave device characterization 现场毫米波器件特性的集成测试概念
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7181980
D. Kissinger, J. Nehring, Andreas Oborovski, Karl Borutta, I. Nasr, B. Laemmle, R. Weigel
{"title":"Integrated test concepts for in-situ millimeter-wave device characterization","authors":"D. Kissinger, J. Nehring, Andreas Oborovski, Karl Borutta, I. Nasr, B. Laemmle, R. Weigel","doi":"10.1109/NEWCAS.2015.7181980","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7181980","url":null,"abstract":"This paper presents our recent work towards state-of-the-art integrated test concepts for the in-situ characterization of silicon-integrated millimeter-wave devices and transceiver components for radar and communication applications. Narrowband as well as ultra-broadband integrated network analysis solutions for a variety of frequency bands ranging from 50 to 120 GHz are outlined. In this context, direct-conversion and heterodyne architectures and their respective implementations in silicon-germanium technologies are discussed.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"62 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126625654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
DPDK and MKL; Enabling technologies for near deterministic cloud-based signal processing DPDK和MKL;支持基于云的近确定性信号处理技术
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182086
Roya Alizadeh, N. Bélanger, Y. Savaria, J. Frigon
{"title":"DPDK and MKL; Enabling technologies for near deterministic cloud-based signal processing","authors":"Roya Alizadeh, N. Bélanger, Y. Savaria, J. Frigon","doi":"10.1109/NEWCAS.2015.7182086","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182086","url":null,"abstract":"This work explores different means to implement software defined cellular radio over the cloud, which sets stringent real-time requirements. DPDK and MKL are two technologies proposed by Intel that can be used for that purpose. In this paper, we explore those technologies and using operating system isolation to reduce the computation time variability for LTE processes. It is found that MKL offers excellent performance, but as it is not scalable by itself over the cloud, combining it with DPDK is a very promising alternative. DPDK allows improving performance, memory management and makes MKL scalable.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125064219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
All-digital MEMS tuning-fork self-excited vibration control by phase-relation using TAD-based ADPLL 基于ad ADPLL的全数字MEMS音叉自激振动相位控制
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182074
S. Yamauchi, Takamoto Watanabe
{"title":"All-digital MEMS tuning-fork self-excited vibration control by phase-relation using TAD-based ADPLL","authors":"S. Yamauchi, Takamoto Watanabe","doi":"10.1109/NEWCAS.2015.7182074","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182074","url":null,"abstract":"For achieving an all-digital resonant MEMS gyroscope, this paper presents an all-digital MEMS tuning-fork self-excited vibration control method, using TAD (Time-A/D converter)-based all-digital PLL (TAD-ADPLL) by applying a unique control algorithm based on entirely time-domain processing, which uses no conventional analog method such as automatic gain control (AGC) or automatic level control (ALC). The proposed algorithm involves three-step processing: 1) driving a tuning-fork using the ADPLL for searching its self-resonant frequency, 2) comparing the phase difference between drive-pulse signal and monitor-pulse signal, which should be 90o (π/2-radian) each other, and 3) keeping 90o-relationship between them even with any drift factors such as temperature, supply voltage, etc. In this method, TAD-type TDC (time-to-digital converter) digitizes the resonant frequency and phase difference alternately in order to realize self-excited vibration condition along with TAD-type DCO (digitally-controlled oscillator) without the need for any analog circuit method. By using a conventional piezoelectric MEMS tuning-fork element, we experimentally confirmed its self-excited vibration, resulting in its resonance jitter level of σ = 52.6ns at 37μs-self-resonance period. Finally, we propose an all-digital synchronous detection of angular-rate signal for achieving a digital-type gyro sensor.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123624705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Self-timed circuits FPGA implementation flow 自定时电路FPGA实现流程
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182063
Mickaël Fiorentino, Omar Al-Terkawi Hasib, Y. Savaria, C. Thibeault
{"title":"Self-timed circuits FPGA implementation flow","authors":"Mickaël Fiorentino, Omar Al-Terkawi Hasib, Y. Savaria, C. Thibeault","doi":"10.1109/NEWCAS.2015.7182063","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182063","url":null,"abstract":"The conventional synchronous design approach is not suitable for implementing self-timed circuits on FPGAs. When design tools try to meet synchronous circuits timing constraints, they can violate self-timed setup timing constraints. This paper proposes a new methodology for implementing self-timed circuits in modern FPGAs using the Xilinx Hierarchical Design flow and a convenient architecture of a configurable delay element. Reported simulation results, in accordance with static timing analysis, show that the self-timed timing constraints are satisfied using our design methodology.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121623833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Balancing test cost reduction vs. measurements accuracy at test time 平衡测试成本降低与测试时的测量精度
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182104
Matthieu Verdy, D. Morche, E. Foucauld, S. Lesecq, Jean-Pascal Mallet, Cedric Mayor
{"title":"Balancing test cost reduction vs. measurements accuracy at test time","authors":"Matthieu Verdy, D. Morche, E. Foucauld, S. Lesecq, Jean-Pascal Mallet, Cedric Mayor","doi":"10.1109/NEWCAS.2015.7182104","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182104","url":null,"abstract":"Reducing test costs of analog and RF circuits is a complex challenge, for which intuitive solution is to reduce test time. However, such reduction usually leads to a degradation of measurement accuracy not easy to handle when no model is available to understand the impact of the reduction. This work presents a novel method to evaluate the impact of test time reduction on yield accuracy, using only measured values and easy-to-obtain uncertainty models. The results proposed by this method provide a balance between test time reduction and yield accuracy. The proposed method is applied on the evaluation of a SNR measurement and provides a representation of the impact of measurement time reduction on yield loss.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123279537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A synthesizable Time to Digital Converter (TDC) with MIMO spatial oversampling method 基于MIMO空间过采样方法的可合成时数转换器(TDC)
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182088
Yalcin Balcioglu, Günhan Dündar
{"title":"A synthesizable Time to Digital Converter (TDC) with MIMO spatial oversampling method","authors":"Yalcin Balcioglu, Günhan Dündar","doi":"10.1109/NEWCAS.2015.7182088","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182088","url":null,"abstract":"A 7 ps/LSB, 0.02 mm2 and 3.9 mW@50MHz Time to Digital Converter architecture with novel MIMO spatial oversampling method is proposed as part of an effort to implement an all-digital PLL (ADPLL) by replacing the phase frequency detector in phase locked loops (PLL). Multiple ring oscillators with unique and variable frequencies are used in order to make N independent measurements of the time pulse to be measured M times in order to create transmitter and receiver diversity similar to those in MxN MIMO antenna arrays. Targeted for wired applications, the design favors portability and flexibility by using standard cells and digital design flow.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125475123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Impact of short-channel effects on velocity overshoot in MOSFET 短通道效应对MOSFET中速度超调的影响
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182061
G. Hiblot, Q. Rafhay, F. Boeuf, G. Ghibaudo
{"title":"Impact of short-channel effects on velocity overshoot in MOSFET","authors":"G. Hiblot, Q. Rafhay, F. Boeuf, G. Ghibaudo","doi":"10.1109/NEWCAS.2015.7182061","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182061","url":null,"abstract":"In this work, the impact of short-channel effects on velocity overshoot is discussed. Hydrodynamic simulations are first performed to investigate the overshoot behavior under a uniform electric field. Then a spatially varying electric field, which corresponds to the electric field profile in a MOSFET in inversion, is introduced to observe the impact of short-channel effects on velocity overshoot. Finally, SPICE simulations of a ring-oscillator are used to analyze how the combined influence of overshoot and short-channel effects affect the performance of downscaled CMOS technology.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128241939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A 2μW biomedical frontend with ΣΔ ADC for self-powered U-healthcare devices in 0.18μm CMOS technology 采用0.18μm CMOS技术的2μW生物医学前端和ΣΔ ADC，适用于自供电u -医疗设备
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS) Pub Date : 2015-06-07 DOI: 10.1109/NEWCAS.2015.7182054
P. Jha, P. Patra, J. Naik, A. Dutta, A. Acharyya, P. Rajalakshmi, S. Singh
{"title":"A 2μW biomedical frontend with ΣΔ ADC for self-powered U-healthcare devices in 0.18μm CMOS technology","authors":"P. Jha, P. Patra, J. Naik, A. Dutta, A. Acharyya, P. Rajalakshmi, S. Singh","doi":"10.1109/NEWCAS.2015.7182054","DOIUrl":"https://doi.org/10.1109/NEWCAS.2015.7182054","url":null,"abstract":"This paper presents an ultra-low power analog front end (AFE) with ΣΔ modulator ADC meant for acquisition of biopotential signals. The system consists of a signal conditioning stage with programmable gain and bandwidth, a mixed signal automatic gain control (AGC), and a ΣΔ ADC. The full system is designed in UMC 18μm CMOS. The AFE achieves an overall linearity of more 10 bits with 0.47μW power consumption. The ADC provides 2nd order noise shaping while using single integrator and an ENOB of ~12 bits with 1.4μW power consumption. The system was successfully tested for a ECG signal from PTB database.","PeriodicalId":404655,"journal":{"name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128279277","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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