{"title":"Diode-Coupled Noise-Scalable Multi-Core BiCMOS VCOs","authors":"Domenico Riccardi, A. Mazzanti","doi":"10.1109/ICECS49266.2020.9294967","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294967","url":null,"abstract":"The ever-growing mobile data traffic is driving continuous innovation in wireless communication and future mobile networks are expected to provide ultra-high data rates. However, the use of spectrally efficient high-order modulations sets challenging phase-noise specifications, particularly in the network infrastructure. In this paper, multi-core diode-coupled LC voltage-controlled oscillators in BiCMOS technology are proposed to meet the challenge of achieving ultra-low phase noise in a scalable and power-efficient way. Compared to resistive switches (realized with MOS transistors), diodes are compatible with the larger voltage swing of low-noise bipolar oscillators and the coupling strength can be adjusted with the diode bias current. A theoretical model investigates design trade-off and the effect of resonance frequencies mismatches among the different oscillators. A quad-core 20GHz oscillator is finally simulated, showing a phase noise as low as -125dBc/Hz at 1MHz from the carrier with a tuning range of 18% and 240mW power consumption. According to noise requirements, two or three auxiliary cores can be turned off raising phase noise by 3dB or 6dB but reducing the power consumption to 120mW or 57mW respectively.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121511097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Embedded Feedback System for Upper Limb Prosthetics","authors":"Yahya Abbass, M. Saleh, A. Ibrahim, M. Valle","doi":"10.1109/ICECS49266.2020.9294781","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294781","url":null,"abstract":"This paper proposes an embedded tactile sensory feedback system for the upper-limb prosthesis. The feedback system delivers tactile information extracted from tactile sensors to the user through electrocutaneous stimulation. The proposed system has been tested experimentally on three healthy subjects. Results demonstrate the correct feedback of the tactile information when the subjects were able to identify the location and the contact pressure level applied to the sensor arrays with a recognition rate of 86%. The system can provide feedback with a delay of around 32 ms while consuming 300 mW opening up interesting perspectives for wearable feedback systems for prosthetics.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"4 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133576440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"CRP: Context-directed Replacement Policy to Improve Cache Performance for Coarse-Grained Reconfigurable Arrays","authors":"Chen Yang, Jia Hou, Yizhou Wang, Li Geng","doi":"10.1109/ICECS49266.2020.9294864","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294864","url":null,"abstract":"This paper proposed a context-directed replacement policy (CRP) to improve cache hit rate for Coarse-grained reconfigurable arrays (CGRA). CRP updates the replacement priority according to the usage rate of configuration contexts. Once finding two candidates of configuration contexts with the highest replacement priority, CRP reserves the larger context in cache and evict the smaller one. Using five different access patterns as benchmark, experimental results show that CRP outperforms LRU and RRIP replacement policies, especially for scan and mixed access patterns. Under the test of random access sequence, CRP can averagely improve cache hit rate by 36% and 20%, compared to RRIP and LRU, respectively.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121267369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Energy-Efficient Design of Approximated Full Adders","authors":"P. Silva, C. Meinhardt","doi":"10.1109/ICECS49266.2020.9294925","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294925","url":null,"abstract":"This work analyses a set of approximate full adder circuits in 7nm FinFET device technology in order to identify how energy-efficient these designs are for different voltage operation points. The behavior in a specific environment with voltage scaling is compared to conventional exact adders. The results allow designers access to the pros and cons of each design in error-tolerant applications. Considering the impact on delay and power consumption, approximate XNOR and PTL based FAs showed increase in PDP for all voltages applied. However, Mirror Adder inspired approximate designs showed a reduction in PDP at 0.4V. The PDP for buffer approximated FAs remained constant throughout voltage scaling.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132687785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Virginia Zúñiga-González, L. Camuñas-Mesa, B. Linares-Barranco, T. Serrano-Gotarredona, J. M. Rosa
{"title":"Using Neural Networks for Optimum band selection in Cognitive-Radio Systems","authors":"Virginia Zúñiga-González, L. Camuñas-Mesa, B. Linares-Barranco, T. Serrano-Gotarredona, J. M. Rosa","doi":"10.1109/ICECS49266.2020.9294894","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294894","url":null,"abstract":"The growing development of Internet of Things (IoT) devices is producing an increasing use of the electromagnetic spectrum for wireless communications. Cognitive Radio (CR) technology provides communication terminals with the capability to select arbitrary frequency bands dynamically in order to make a more efficient use of the frequency spectrum and bands occupied by different standards and communication protocols. In this work, we propose a system which uses Long Short-Term Memory (LSTM) networks to predict the future occupation of frequency bands and modifies the specifications of the analog and radio-frequency front-end, adapting dynamically to the best communication channel. System-level simulations of a band-pass filter are shown as a case study to validate the presented approach.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"180 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134318860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"[Copyright notice]","authors":"","doi":"10.1109/icecs49266.2020.9294830","DOIUrl":"https://doi.org/10.1109/icecs49266.2020.9294830","url":null,"abstract":"","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"9 20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134433142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ARDER: An Automatic EEG Artifacts Detection and Removal System","authors":"Chenbei Zhang, Y. Lian, Guoxing Wang","doi":"10.1109/ICECS49266.2020.9294865","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294865","url":null,"abstract":"This paper presents an EEG artifacts detection and removal system (ARDER). It effectively removes several types of artifacts including ocular, muscle and transmission-line by utilizing a two-step approach: (1) identifying the type of artifact being presented, and (2) applying an appropriate technique to remove the detected artifact. Experiment results show the proposed system can preserve EEG information well while efficiently removing various artifacts.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133117154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Scholl, Christoph Beyerstedt, R. Wunderlich, S. Heinen
{"title":"Triple Band Wireless Transceiver demonstrating Reliable and Low Latency Communication","authors":"M. Scholl, Christoph Beyerstedt, R. Wunderlich, S. Heinen","doi":"10.1109/ICECS49266.2020.9294936","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294936","url":null,"abstract":"This work presents a fully integrated triple band wireless transceiver with integrated PAs for robust and reliable communication. With this transceiver a closed loop control system incorporating wireless communication is implemented achieving 425 µs latency with high reliability enabling applications in industry 4.0. With the presented transceiver architecture the unlicensed 2.4 GHz band and the ISM bands at 780-960 MHz and 390–510 MHz are supported with a single 1.5-2.0 GHz frequency synthesizer leading to an area efficient design and achieving interferer robustness by utilizing independent communication channels and bands. The chip has been fabricated in a 130 nm CMOS technology while the system is completed by off-the-shelf electronic components.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"248 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133357621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Hybrid Microenergy Harvesters for Smart Contact Lenses","authors":"Yuanjie Xia, H. Heidari, Hua Fan, R. Ghannam","doi":"10.1109/ICECS49266.2020.9294884","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294884","url":null,"abstract":"Smart electronic contact lenses typically integrate communications modules, electronic circuitry, sensors and an energy storage reservoir. These smart contact lenses can be used in medical applications that include monitoring patient glucose and intraocular pressure (IOP). However, due to the health hazards associated with chemical batteries, as well as the inconvenience of consistently charging the energy storage reservoir, a sustainable and reliable energy harvesting system is required. Therefore, the aim of this research is to design and develop an optimised harvester for a contact lens application. In fact, this paper introduces a novel hybrid microenergy harvester concept, which aims to produce sufficient electricity to power an electronic contact lens using light and electromagnetic radiation that are scavenged from photovoltaic cells and radio frequency technology.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115009733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Hybrid Memristor-CMOS Based Up-Down Counter Design","authors":"K. Alammari, A. Ahmadi, M. Ahmadi","doi":"10.1109/ICECS49266.2020.9294786","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294786","url":null,"abstract":"The newly discovered Memristor device is finding its way in today's circuit design. It is believed that processing and saving data in Memristors improve chip performance, and they might become an alternative solution for the CMOS technology. This work presents the implementation of 4-bit Up-Down counter utilizing the hybrid Memristor-CMOS platform. The simulation results have proven design and functionality of the Memristive counter. The proposed counter employs fewer numbers of transistors than conventional CMOS counter. Therefore, the proposal has a small layout area and shows a reasonable reduction in power consumption and delay. While other Up-Down counter which relies on the pure Memristive method “IMPLY” reported less area. However, our work overcomes the issues of delay and complexity produced by the lengthy operational steps associated with IMPLY based counter.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124818744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}