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2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)最新文献

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Hardware Trojan Design and Detection in Asynchronous NCL Circuits 异步NCL电路中的硬件木马设计与检测
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294946
Kushal K. Ponugoti, S. Srinivasan, S. Smith
{"title":"Hardware Trojan Design and Detection in Asynchronous NCL Circuits","authors":"Kushal K. Ponugoti, S. Srinivasan, S. Smith","doi":"10.1109/ICECS49266.2020.9294946","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294946","url":null,"abstract":"Hardware Trojans that degrade performance, change functionality, leak information, or halt service, have been problematic in synchronous circuits. Asynchronous circuits are gaining popularity due to their lower power consumption, and better immunity against PVT (process, voltage, temperature) variations. In this paper, we show some designs to realize hardware Trojans in NULL Convention Logic (NCL), which is a Quasi-Delay Insensitive (QDI) asynchronous digital circuit paradigm. We also present a formal verification methodology to detect such Trojans, and validate our technique on an RSA decryption circuit.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134125260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
150 GHz Differential Amplifiers with Lumped-Elements Matching Networks in 55 nm SiGe BiCMOS 55 nm SiGe BiCMOS中集总元匹配网络的150 GHz差分放大器
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294979
I. Petricli, H. Lotfi, A. Mazzanti
{"title":"150 GHz Differential Amplifiers with Lumped-Elements Matching Networks in 55 nm SiGe BiCMOS","authors":"I. Petricli, H. Lotfi, A. Mazzanti","doi":"10.1109/ICECS49266.2020.9294979","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294979","url":null,"abstract":"This paper presents compact D-band amplifiers in 55 nm SiGe BiCMOS technology. Device models and design tools are first validated with measurements on elementary components above 100 GHz. Then, amplifiers are designed leveraging lumped components in matching networks for minimum area occupation. A differential topology is developed for robustness against parasitic effects of the non-ideal ground, a key issue with lumped components at high frequency. Experimental results are in very good agreement with simulations. The 1-stage amplifier reaches 8 dB gain at 156 GHz and 17.8 GHz bandwidth in 0.026 mm2 silicon area. The 2-stage amplifier displays 17.4 dB gain at 157 GHz with 42.7 GHz bandwidth in 0.048 mm2. Compared to previously reported SiGe amplifiers in similar frequency range, more than 2x core area reduction is demonstrated at comparable gain-bandwidth product.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"208 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132981780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Micro - GAGE: A Low-power Compact GAGE Hash Function Processor for IoT Applications Micro - GAGE:一款低功耗紧凑型GAGE哈希函数处理器，用于物联网应用
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294948
Mohamed El-Hadedy, M. Margala, Sergiu Mosanu, D. Gligoroski, Jinjun Xiong, Wen-mei W. Hwu
{"title":"Micro - GAGE: A Low-power Compact GAGE Hash Function Processor for IoT Applications","authors":"Mohamed El-Hadedy, M. Margala, Sergiu Mosanu, D. Gligoroski, Jinjun Xiong, Wen-mei W. Hwu","doi":"10.1109/ICECS49266.2020.9294948","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294948","url":null,"abstract":"The emergence of Internet of Things (IoT) applications presents a wide range of opportunities in areas such as automotive, consumer, energy, smart city and many others. Since many of these systems operate in environments with heightened sensitivity and privacy, they require trusted level of security. In addition, the implemented security measures must fit within strict power and area budgets, yet deliver maximum performance mandated by the application. In this paper, we propose and evaluate the area, power and performance of a novel compact low-power GAGE hash function processor (MICRO-GAGE). The results show Micro- Gageis 28× more power-efficient than the reported implementation of GAGE hash function on AVR ATMEGA 328p micro-controller. Micro- Gageneeds approximately 2.6 times less power than several comparable LWC designs. In addition, the proposed processor performs approximately 2.6 times longer than the other LWC designs when powered by typical Ni-Cd battery.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116591258","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Indexed Color History Many-Core Engines for Display Stream Compression Decoders 用于显示流压缩解码器的索引颜色历史多核引擎
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294826
Shifu Wu, B. Baas
{"title":"Indexed Color History Many-Core Engines for Display Stream Compression Decoders","authors":"Shifu Wu, B. Baas","doi":"10.1109/ICECS49266.2020.9294826","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294826","url":null,"abstract":"This paper describes and compares 9 many-core designs and software implementations of the Indexed Color History (ICH) module, which is part of VESA Display Stream Compression (DSC) decoders. The smallest design is mapped to only 8 small processors. Other designs use a new algorithm to split the ICH table update process into index update and entry update tasks. This algorithm is implemented with a variety of parallel and optimized architectures to provide a range of throughputs and energy efficiencies utilizing from 9 to 53 processors. The proposed ICH designs deliver frame rates in 1080p (1920×1080) up to 75, 74, and 38 frames per second (fps) in 4:2:0, 4:2:2, and 4:4:4 modes, while dissipating 15 mJ, 16 mJ, and 30 mJ per frame respectively at 1.75 GHz at 1.1 V. Compared to reference designs implemented on an Intel i7-7700HQ, the proposed designs achieve up to 3.4×, 3.9×, and 5.3× higher frame rates, and up to 177×, 193×, and 261× lower energy per frame in 4:2:0, 4:2:2, and 4:4:4 modes respectively.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124976379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 58 nW ± 35 ppm/°C Oscillator for IoT Battery-less Sensor Applications 58 nW±35 ppm/°C振荡器，用于物联网无电池传感器应用
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294792
Milad Salehi, Mohamed Ali, Y. Savaria, M. Sawan
{"title":"A 58 nW ± 35 ppm/°C Oscillator for IoT Battery-less Sensor Applications","authors":"Milad Salehi, Mohamed Ali, Y. Savaria, M. Sawan","doi":"10.1109/ICECS49266.2020.9294792","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294792","url":null,"abstract":"We present in this paper a battery-less sensor structure with energy harvesting in which an antenna is used for both collecting the RF signals and as a sensing element. Also, an ultra-low-power oscillator with low sensitivity to temperature variations has been designed to generate a clock signal for the proper operation of the proposed sensor design. This oscillator is intended for ultra-low power and low-frequency applications. It consumes only 58 nW of power from a 1 V supply while occupying 190 μm x 120 μm of silicon area. In addition, it shows temperature sensitivity of ± 35 ppm/°C over temperatures ranging from −40 to 85 °C. The proposed structure has been designed and simulated with a 0.18 μm standard CMOS technology. The proper functionality of the presented design has been validated through post-layout simulation results.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130252566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low Profile Metamaterial Band-Pass Filter Loaded with 4-Turn Complementary Spiral Resonator for WPT Applications 低轮廓超材料带通滤波器负载4匝互补螺旋谐振器的WPT应用
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294811
R. Keshavarz, N. Shariati
{"title":"Low Profile Metamaterial Band-Pass Filter Loaded with 4-Turn Complementary Spiral Resonator for WPT Applications","authors":"R. Keshavarz, N. Shariati","doi":"10.1109/ICECS49266.2020.9294811","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294811","url":null,"abstract":"In this paper, a very compact $(0.03lambda_{mathrm{g}}times 0.18lambda_{mathrm{g}})$ and low insertion loss (<0.4 dB) metamaterial band-pass filter (MBPF) at the center frequency of f0=730 MHz is proposed, based on the rectangular-shape 4-turn complementary spiral resonators (4-CSR). The proposed MBPF consists of an interdigital capacitor as a series capacitance in the top layer, leading to improve the stopband performance in the pass-band range of 700~760 MHz, which makes it suitable for wireless power transfer (WPT) systems by rejecting unwanted signals. In order to validate the performance of the proposed technique, the MBPF is fabricated on the RO-4003 substrate and great agreement is achieved between simulated and measured results. The stop-band attenuations of greater than 52 dB and 20 dB are obtained around the 0.8×fcl(lower cutoff frequency) and 1.2×fcu(upper cutoff frequency), respectively.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129182983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
OTA Performance Space Modeling for System-Level Optimization of SC-circuits 面向sc电路系统级优化的OTA性能空间建模
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294896
D. Schreiber, J. Kampe
{"title":"OTA Performance Space Modeling for System-Level Optimization of SC-circuits","authors":"D. Schreiber, J. Kampe","doi":"10.1109/ICECS49266.2020.9294896","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294896","url":null,"abstract":"This paper is about high-level modeling of analog circuits based on its complete feasible performance space. The behavioral model is a multi-dimensional description of all enclosing surfaces of this space, approximated by a set of boundary points. An exploration method, applying the Normal Boundary Intersection with a novel constraint rotation method, is shown to calculate these boundary points. The solutions are found by transistor level spice simulations, which leads to a highly accurate approximated model. A fully-differential transconductance amplifier with folded cascode and class-AB output stage is taken as example circuit, whose performance space model is calculated by the deterministic exploration scheme. The resulting model is used to perform an efficient system level optimization towards accuracy of a switched capacitor circuit.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129922378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A test setup for the characterization of Lorentz-force MEMS magnetometers 用于表征洛伦兹力MEMS磁强计的测试装置
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294898
J. M. Sánchez-Chiva, D. Fernández, J. Madrenas
{"title":"A test setup for the characterization of Lorentz-force MEMS magnetometers","authors":"J. M. Sánchez-Chiva, D. Fernández, J. Madrenas","doi":"10.1109/ICECS49266.2020.9294898","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294898","url":null,"abstract":"Lorentz-force Microelectromechanical Systems (MEMS) magnetometers have been proposed to replace magnetometers in current consumer electronics products. As a result, there exist numerous works that propose MEMS transducers and readout systems. However, when it comes to the characterization of MEMS devices, a wide variety of strategies and instruments are used, making it difficult to compare results from different works. In this article, a test setup for the characterization of Lorentz-force MEMS magnetometers is proposed. The solution in based in the use of an impedance analyser along with a simple and flexible circuit that provides the in-phase driving of the voltage and the current of the MEMS. The proposed solution has been successfully used to characterize MEMS magnetometers with very different characteristics.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126334212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Sub-Threshold Low-Power Integrated Bandpass Filter for Highly-Integrated Spectrum Analyzers 用于高集成频谱分析仪的亚阈值低功耗集成带通滤波器
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294964
G. Long, M. Ericson, C. Britton, Benjamin D. Roehrs, E. Farquhar, S. Frank, A. Yen, B. Blalock
{"title":"A Sub-Threshold Low-Power Integrated Bandpass Filter for Highly-Integrated Spectrum Analyzers","authors":"G. Long, M. Ericson, C. Britton, Benjamin D. Roehrs, E. Farquhar, S. Frank, A. Yen, B. Blalock","doi":"10.1109/ICECS49266.2020.9294964","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294964","url":null,"abstract":"Low-power analog filter banks provide frequency analysis with minimal power and space requirements, making them viable solutions for integrated remote audio- and vibration-sensing applications. Compared with their digital counterparts, analog filter banks are better suited to achieve the lower power consumption necessary for IoT applications. In this work, the design and implementation of a sub-threshold complementary metal-oxide semiconductor (CMOS) integrated low-power tunable bandpass filter channel for signal spectrum analysis and signal discrimination is presented, including performance improvements to stability and precise matching between filter stages. The 8th-order filter channel achieves an effective Q-factor of 4.5 and dynamic range of 60 dB, has an operational frequency range from 2 kHz to 100 kHz, and consumes 256 µW nominally at the highest center frequency. An integrated analog Gm-C filter topology is selected for this application. Functionally, the high-Q bandpass filter transfer function is implemented via four cascaded 2nd-order filter cells and is fabricated in 130-nm 1.2-V CMOS technology, making it suitable for use in monolithic integrated spectral analysis (MISA) applications.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126407536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
An affordable implantable VNS for use in animal research 一种经济实惠的用于动物研究的植入式迷走神经系统
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294958
Ángel Canal-Alonso, Roberto Casado-Vara, J. Corchado
{"title":"An affordable implantable VNS for use in animal research","authors":"Ángel Canal-Alonso, Roberto Casado-Vara, J. Corchado","doi":"10.1109/ICECS49266.2020.9294958","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294958","url":null,"abstract":"In this research, a Vagus Nerve Stimulator (VNS) has been developed and miniaturized for use in epilepsy research. Commercial stimulators are designed for human use and as such represent an enormous expense for neuroscience laboratories, which is why a subcutaneously implantable PCB has been developed. The board contains all the components necessary for its operation during the standard duration of the experiments, being possible to control it once implanted and even being able to reuse it. The VNS has been validated on rats and hamsters and with this solution the expenditure on materials made by laboratories is greatly reduced.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121370247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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