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2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)最新文献

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Analysis of Operational Amplifier Requirements for Extended-Range Second-Order Incremental ADCs 扩展量程二阶增量式adc运算放大器需求分析
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294870
Abhijeet D. Taralkar, F. Conzatti, P. Malcovati, A. Baschirotto
{"title":"Analysis of Operational Amplifier Requirements for Extended-Range Second-Order Incremental ADCs","authors":"Abhijeet D. Taralkar, F. Conzatti, P. Malcovati, A. Baschirotto","doi":"10.1109/ICECS49266.2020.9294870","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294870","url":null,"abstract":"This paper presents the sensitivity analysis of an extended-range, second-order Incremental ADC (IADC) to the non-idealities of the operational amplifiers (op-amps) used. Different configurations of the extended-range IADCs are compared in terms of required ENOB and op-amp specifications. In all the configurations, a flash ADC with varying resolution is used as extended-range ADC. The ADC clock frequency is considered in all cases equal to 80 MHz. From the analysis it turns out that, in order to achieve a given ENOB, the extended-range IADC requires a significantly lower number of clock cycles than a conventional IADC, but the requirements of the op-amps are much more stringent.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"52 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130047302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Area Aware Accelerator for Elliptic Curve Point Multiplication 椭圆曲线点乘法的面积感知加速器
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294908
Malik Imran, S. Pagliarini, M. Rashid
{"title":"An Area Aware Accelerator for Elliptic Curve Point Multiplication","authors":"Malik Imran, S. Pagliarini, M. Rashid","doi":"10.1109/ICECS49266.2020.9294908","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294908","url":null,"abstract":"This work presents a hardware accelerator, for the optimization of latency and area at the same time, to improve the performance of point multiplication process in Elliptic Curve Cryptography. In order to reduce the overall computation time in the proposed 2-stage pipelined architecture, a rescheduling of point addition and point doubling instructions is performed along with an efficient use of required memory locations. Furthermore, a 41-bit multiplier is also proposed. Consequently, the FPGA and ASIC implementation results have been provided. The performance comparison with state-of-the-art implementations, in terms of latency and area, proves the significance of the proposed accelerator.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130192903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Synchronous conditioning circuits for piezo- and triboelectric harvesters in CMOS technologies CMOS技术中压电和摩擦电采集器的同步调理电路
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294822
É. Lefeuvre, D. Galayko
{"title":"Synchronous conditioning circuits for piezo- and triboelectric harvesters in CMOS technologies","authors":"É. Lefeuvre, D. Galayko","doi":"10.1109/ICECS49266.2020.9294822","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294822","url":null,"abstract":"This focus paper proposed for the track “Energy Harvesting and Power Efficient Electronics” addresses the new generation of conditioning circuits based on active energy extraction techniques, designed by the term “synchronous conditioning circuits”. Initially proposed for enhancing energy yield of piezoelectric transducers having intrinsic poor quality, these techniques are now a part of the established method not only for piezoelectric devices, but also for triboelectric transducers. Their recent success is due to intensive use of integrated CMOS technologies optimized for low-energy power converters, which allowed to build highly efficient systems even in the case when the input energy is of few microwatts. This paper shortly reviews the synchronous energy extraction technique and their applications, and then discusses recent successful implementations in CMOS technologies.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114298703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Redirected Learning Architecture for Non-linear Digital Pre-distortion 非线性数字预失真的重定向学习体系结构
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294791
Aaron F. Ramsey, Andrew K. Bolstad
{"title":"A Redirected Learning Architecture for Non-linear Digital Pre-distortion","authors":"Aaron F. Ramsey, Andrew K. Bolstad","doi":"10.1109/ICECS49266.2020.9294791","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294791","url":null,"abstract":"This paper introduces the redirected learning architecture (RLA) for estimating non-linear digital pre-distortion models for non-linear devices such as power amplifiers. Existing architectures can be classified as direct learning architectures (DLA) or indirect learning architectures (ILA). DLAs first learn a model of the device and then determine a pre-distorter by either directly inverting the device model or estimating a pre-inverse of the model. The RLA is similar to a DLA, but rather than learning a model of the device, the RLA uses fixed-point iteration to determine a set of input/output pairs which characterize the device. These pairs are then used to estimate the pre-distorter by redirecting learning from the device to the pre-distorter. The fixed-point iteration is shown to converge under a mild condition. Simulation of a class AB power amplifier reveals improved suppression of harmonic distortion compared to a pth order inverse approach.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114304420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
W:Ti Intraneural Flexible Electrode for Acute Peripheral Nerve Stimulation Studies Ti神经内柔性电极用于急性周围神经刺激研究
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294866
C. Silveira, E. Brunton, E. Escobedo-Cousin, Gaurav Gupta, R. Whittaker, A. O'Neill, K. Nazarpour
{"title":"W:Ti Intraneural Flexible Electrode for Acute Peripheral Nerve Stimulation Studies","authors":"C. Silveira, E. Brunton, E. Escobedo-Cousin, Gaurav Gupta, R. Whittaker, A. O'Neill, K. Nazarpour","doi":"10.1109/ICECS49266.2020.9294866","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294866","url":null,"abstract":"A flexible tungsten:titanium electrode array was fabricated and tested in acute rodent studies. The aim of this study was to understand if this electrode design could stimulate peripheral nerves and if the stimulation could be selective. The results showed that stimulation of the nerves was possible and that at threshold and at low stimulation currents more than half of the electrode contacts could, to a certain extent, selectively stimulate the Tibialis Anterior and the Gastrocnemius muscles. The relevance of this feasibility study is a better understanding of how different material combinations and electrode configurations influence neural stimulation.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116494846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Ultra-low Noise Variable Gain Amplifier with Accurate dB-Linear Characteristic 具有精确db -线性特性的超低噪声变增益放大器
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294852
Bingtian Chen, Yufeng Zhang, Jianxiong Xi, Lenian He
{"title":"An Ultra-low Noise Variable Gain Amplifier with Accurate dB-Linear Characteristic","authors":"Bingtian Chen, Yufeng Zhang, Jianxiong Xi, Lenian He","doi":"10.1109/ICECS49266.2020.9294852","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294852","url":null,"abstract":"In this paper, a high-performance dB-linear variable gain amplifier (VGA) based on gain interpolation is introduced. The VGA core uses a resistor ladder as an attenuator to get different attenuation steps of the input signal. By smoothly moving the gain from one step to the next step, an accurate dB-linear gain characteristic is achieved. A low noise amplifier and a post amplifier are integrated to get lower noise and ensure high linearity, respectively. The chip is fabricated in a 180nm SiGe process and occupies a die area of 1.15mm2. The total gain range is 48dB and the measured gain error is less than 0.27dB. The whole VGA consumes 30mA current from a 5V supply and the bandwidth is 120MHz. The measured in-band input referred noise density is 1nV/√HZ and the measured OIP3 is 33dBm.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116749310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 30-GHz Switched-Capacitor Power Amplifier for 5G SoCs 用于5G soc的30ghz开关电容功率放大器
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294879
A. Saleem, K. Stadius, M. Kosunen, L. Anttila, M. Valkama, J. Ryynänen
{"title":"A 30-GHz Switched-Capacitor Power Amplifier for 5G SoCs","authors":"A. Saleem, K. Stadius, M. Kosunen, L. Anttila, M. Valkama, J. Ryynänen","doi":"10.1109/ICECS49266.2020.9294879","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294879","url":null,"abstract":"Switched-capacitor power amplifier has gained popularity within the radio frequency integrated circuit community, since it is CMOS compatible offering high integration density and good performance particularly in terms of linearity. In this paper we present a study on the use of switched-capacitor power amplifier at millimeter-wave frequency range. We identify the major design challenges in this paper, and demonstrate the feasibility of switched-capacitor power amplifier with a 30-G Hz design case. Our analysis describes the effects of power amplifier device parasitics and their contribution to dynamic power consumption, revealing that these are a major factor in degradation of switched capacitor power amplifier efficiency at millimeter waves. Two circuits, one for 3 GHz and the other for 30 GHz, were designed and simulated with 28-nm bulk CMOS technology. At 3 GHz, the designed switched capacitor power amplifier structure with 6-bit resolution features maximum output power of 19.4 dBm and efficiency of 59% whereas the output power of 18.6 dBm with 21% efficiency is achieved at 30 GHz. The switched-capacitor power amplifier preserves its good linearity at higher frequencies as well, and our design demonstrates an adjacent channel leackage ratio of -34.4 dB at 30 GHz for a 100-MHz OFDM-modulated signal.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131861236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Auxiliary Pulse-Extender and Current-Attenuator Circuits for Flexible Interaction with Memristive Crossbars in SNNs snn中与忆阻交叉栅柔性交互作用的辅助脉冲扩展器和电流衰减器电路
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294887
J. Ahmadi-Farsani, B. Linares-Barranco, T. Serrano-Gotarredona
{"title":"Auxiliary Pulse-Extender and Current-Attenuator Circuits for Flexible Interaction with Memristive Crossbars in SNNs","authors":"J. Ahmadi-Farsani, B. Linares-Barranco, T. Serrano-Gotarredona","doi":"10.1109/ICECS49266.2020.9294887","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294887","url":null,"abstract":"This paper presents a pulse-extender, a delay-element, and a current-attenuator as auxiliary circuits that make it possible to have flexible interaction with memristor crossbars in spiking neural networks. In the presynaptic part, the pulse-extender makes the inputs compatible with the pulsed-characterization of memristors. In the post-synaptic part, the current attenuator relaxes the system in terms of requiring low-offset amplifiers and also makes it possible to design neurons with small membrane capacitors. The circuits are fabricated in a CMOS 180nm technology. The measurements verify that these blocks play an important role in reaching an SNN with real-time performance.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131869317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Welcome Message from the Chairspersons 主席欢迎辞
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/icecs49266.2020.9294804
{"title":"Welcome Message from the Chairspersons","authors":"","doi":"10.1109/icecs49266.2020.9294804","DOIUrl":"https://doi.org/10.1109/icecs49266.2020.9294804","url":null,"abstract":"","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132301433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Ultrasound Body Area Network for Arm Gesture Recognition 一种用于手臂手势识别的超声身体区域网络
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2020-11-23 DOI: 10.1109/ICECS49266.2020.9294835
E. Pfann, M. Huemer
{"title":"An Ultrasound Body Area Network for Arm Gesture Recognition","authors":"E. Pfann, M. Huemer","doi":"10.1109/ICECS49266.2020.9294835","DOIUrl":"https://doi.org/10.1109/ICECS49266.2020.9294835","url":null,"abstract":"This contribution describes the concept and implementation of a wearable arm gesture recognition system. The system relies on an ultrasound body area network for communication and to enable distance measurements between torso and arms. The network nodes use new capacitive micromachined ultrasonic transducer technology. The operation and performance is shown with the help of a real time demonstrator system.","PeriodicalId":404022,"journal":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133681968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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