Analysis of Operational Amplifier Requirements for Extended-Range Second-Order Incremental ADCs

Abhijeet D. Taralkar, F. Conzatti, P. Malcovati, A. Baschirotto
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Abstract

This paper presents the sensitivity analysis of an extended-range, second-order Incremental ADC (IADC) to the non-idealities of the operational amplifiers (op-amps) used. Different configurations of the extended-range IADCs are compared in terms of required ENOB and op-amp specifications. In all the configurations, a flash ADC with varying resolution is used as extended-range ADC. The ADC clock frequency is considered in all cases equal to 80 MHz. From the analysis it turns out that, in order to achieve a given ENOB, the extended-range IADC requires a significantly lower number of clock cycles than a conventional IADC, but the requirements of the op-amps are much more stringent.
扩展量程二阶增量式adc运算放大器需求分析
本文介绍了一种扩展量程二阶增量ADC (IADC)对所用运算放大器(运放)非理想性的灵敏度分析。根据所需的ENOB和运放规格,比较了不同配置的增程adc。在所有的配置中,可变分辨率的闪存ADC被用作扩展范围ADC。ADC时钟频率在所有情况下都被认为等于80mhz。从分析中可以看出,为了实现给定的ENOB,扩展范围IADC所需的时钟周期数量明显低于传统IADC,但对运算放大器的要求要严格得多。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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