Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)最新文献

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A 28 nm Fast Tracker Front-End for Phase-II Atlas sMDT Detectors 用于ii期Atlas sMDT探测器的28 nm快速跟踪前端
A. Pipino, Marcello DeMatteis, F. Resta, L. Mangiagalli, A. Baschirotto, H. Kroha, R. Richter, O. Kortner
{"title":"A 28 nm Fast Tracker Front-End for Phase-II Atlas sMDT Detectors","authors":"A. Pipino, Marcello DeMatteis, F. Resta, L. Mangiagalli, A. Baschirotto, H. Kroha, R. Richter, O. Kortner","doi":"10.22323/1.343.0091","DOIUrl":"https://doi.org/10.22323/1.343.0091","url":null,"abstract":"","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130478536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Radiation tolerance enhancement of silicon photonics for HEP applications HEP应用中硅光子学的辐射容忍度增强
A. Kraxner, S. Détraz, L. Olantera, C. Scarcella, C. Sigaud, C. Soós, Carmine Stile, J. Troska, F. Vasey
{"title":"Radiation tolerance enhancement of silicon photonics for HEP applications","authors":"A. Kraxner, S. Détraz, L. Olantera, C. Scarcella, C. Sigaud, C. Soós, Carmine Stile, J. Troska, F. Vasey","doi":"10.22323/1.343.0150","DOIUrl":"https://doi.org/10.22323/1.343.0150","url":null,"abstract":"Silicon photonics modulators and photodiodes are being investigated for use in optical links for High Energy Physics experiments. In order to withstand the harsh environment in the innermost detector regions of the Large Hadron Collider at CERN and in future High Energy Physics experiments beyond the Large Hadron Collider, components will have to be resistant against extreme levels of radiation. First, we show that Mach-Zehnder modulators, which lost their functionality after X-ray irradiation, can be fully recovered by applying a forward bias after irradiation. Devices irradiated and recovered withstand the same TID when re-irradiated. Furthermore, it is presented that by applying a forward bias already during irradiation, the irradiation-induced degradation can be compensated. The possibility of device recovery could lead to a tremendous increase of radiation resistance of the optical links. Additionally, the resistance against displacement damage and ionizing radiation of silicon germanium photodiodes is presented.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133352529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Design of a HVCMOS pixel sensor ASIC with on-chip readout electronics for ATLAS ITk Upgrade 用于ATLAS ITk升级的带有片上读出电子器件的HVCMOS像素传感器ASIC的设计
M. Prathapan, P. Barrillon, M. Benoit, R. Casanova, F. Ehrler, P. Pangaud, Sourav Pusti, R. Schimassek, E. Vilella, A. Weber, W. Wong, Hui Zhang, I. Perić
{"title":"Design of a HVCMOS pixel sensor ASIC with on-chip readout electronics for ATLAS ITk Upgrade","authors":"M. Prathapan, P. Barrillon, M. Benoit, R. Casanova, F. Ehrler, P. Pangaud, Sourav Pusti, R. Schimassek, E. Vilella, A. Weber, W. Wong, Hui Zhang, I. Perić","doi":"10.22323/1.343.0074","DOIUrl":"https://doi.org/10.22323/1.343.0074","url":null,"abstract":"ATLASpix is a series of monolithic High Voltage CMOS (HVCMOS) sensor chips that are engineered to meet the requirements of outer layers of ATLAS ITk pixel tracker for HL-LHC upgrade. They are large collection electrode designs on high resistive wafers to ensure high detection efficiency and radiation tolerance. The readout electronics are placed on the chip periphery. ATLASpix1_M2 prototype is fabricated in a commercial 180 nm CMOS technology and has an active area of 1.6 cm × 0.33 cm. No clock signals are propagated inside the pixel matrix reducing the crosstalk and helping to achieve an estimated power consumption of 300 mW/cm$^{2}$. This work presents the design of ATLASpix_M2 with emphasis on its readout electronics, together with some experimental results.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"251 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116025166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
System level serial powering studies of RD53A chip RD53A芯片的系统级串行供电研究
A. Pradas, D. Koukola, S. Orfanelli, J. Christiansen, M. Karagounis, F. Arteche
{"title":"System level serial powering studies of RD53A chip","authors":"A. Pradas, D. Koukola, S. Orfanelli, J. Christiansen, M. Karagounis, F. Arteche","doi":"10.22323/1.343.0147","DOIUrl":"https://doi.org/10.22323/1.343.0147","url":null,"abstract":"","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129165583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 130 nm CMOS PLL for Phase-II ATLAS-MDT TDC 用于ii相ATLAS-MDT TDC的130 nm CMOS锁相环
A. Pipino, M. Matteis, F. Resta, A. Baschirotto, H. Kroha, R. Richter, O. Kortner, J. Zhu, J. Wang
{"title":"A 130 nm CMOS PLL for Phase-II ATLAS-MDT TDC","authors":"A. Pipino, M. Matteis, F. Resta, A. Baschirotto, H. Kroha, R. Richter, O. Kortner, J. Zhu, J. Wang","doi":"10.22323/1.343.0092","DOIUrl":"https://doi.org/10.22323/1.343.0092","url":null,"abstract":"Global Project: Development of a TDC for ATLAS MDT Phase-II Upgrade Features: • Trigger-less and trigger mode • Edge and pair modes • Programmable output lines rates: 80 (legacy), 320, 640 Mbps • Re-design in TSMC 130nm technology – Clock and phase generator (ePLL) • 4 clock phase time interpolator @320MHz  3,125 ns/4 = 0,78ns LSB – TDC time-digitization unit (x24) and digital processing logics Trigger and readout scheme for the Phase-II MDT system","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121622375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Novel P-in-N Si-Sensor technology for high resolution and high repetition-rate experiments at accelerator facilities 用于加速器设备高分辨率和高重复率实验的新型P-in-N硅传感器技术
M. Patil, M. Caselle, L. Rota, A. Dierlamm, M. Bacardit, G. Niehues, E. Bründermann, M. Weber, A. Müller, G. Borghi, M. Boscardin
{"title":"Novel P-in-N Si-Sensor technology for high resolution and high repetition-rate experiments at accelerator facilities","authors":"M. Patil, M. Caselle, L. Rota, A. Dierlamm, M. Bacardit, G. Niehues, E. Bründermann, M. Weber, A. Müller, G. Borghi, M. Boscardin","doi":"10.22323/1.343.0045","DOIUrl":"https://doi.org/10.22323/1.343.0045","url":null,"abstract":"Linear array detectors with high spatial resolution and MHz frame-rates are essential for high-rate experiments at accelerator facilities. KALYPSO, a line array detector with 1024 pixels operating over 1 Mfps has been developed. To improve the spatial resolution and sensitivity at different wavelengths, novel p-in-n Si microstrip sensors based on have been developed with a pitch of 25 micrometer. The efficiency of the sensor has been improved with the use of anti reflecting coating layers optimized for near infrared, visible and near ultraviolet. In this contribution the detector system and the sensors will be presented.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123548863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Next generation of Radiation Tolerant Single-Mode Optical Links for Accelerator Instrumentation 用于加速器仪器的下一代耐辐射单模光链路
C. Scarcella, M. B. Marin, S. Détraz, Rhodri Jones, A. Kraxner, L. Olantera, C. Sigaud, C. Soós, Carmine Stile, J. Troska, F. Vasey
{"title":"Next generation of Radiation Tolerant Single-Mode Optical Links for Accelerator Instrumentation","authors":"C. Scarcella, M. B. Marin, S. Détraz, Rhodri Jones, A. Kraxner, L. Olantera, C. Sigaud, C. Soós, Carmine Stile, J. Troska, F. Vasey","doi":"10.22323/1.343.0151","DOIUrl":"https://doi.org/10.22323/1.343.0151","url":null,"abstract":"Long-reach data transmission is an enabling technology for Accelerator Instrumentation at CERN. We present the development of next generation radiation-hard single-mode optical links. This new design aims to support the increasing data volume produced by the beam sensing electronics deployed along the accelerators. We present the design of the new optical data link and its characterization in terms of functional performance and radiation tolerance.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131019734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger. NaNet:用于NA62低电平触发器中实时分布式异构流处理的可重构PCIe网络接口卡架构。
P. Cretaro, A. Biagioni, O. Frezza, F. Lo Cicero, A. Lonardo, M. Martinelli, P. Paolucci, L. Pontisso, F. Simula, P. Vicini, C. Capone, F. Capuani, G. De Bonis, E. Pastorelli, R. Ammendola, G. Lamanna, M. Sozzi, R. Piandani, D. Soldi
{"title":"NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger.","authors":"P. Cretaro, A. Biagioni, O. Frezza, F. Lo Cicero, A. Lonardo, M. Martinelli, P. Paolucci, L. Pontisso, F. Simula, P. Vicini, C. Capone, F. Capuani, G. De Bonis, E. Pastorelli, R. Ammendola, G. Lamanna, M. Sozzi, R. Piandani, D. Soldi","doi":"10.22323/1.343.0118","DOIUrl":"https://doi.org/10.22323/1.343.0118","url":null,"abstract":"Dario Soldi INFN Sezione di Torino Via Pietro Giuria, 1 10125 Torino, Italy E-mail: dario.soldi@to.infn.it The NA62 experiment at CERN SPS is aimed at measuring the branching ratio of the the very rare kaon decay K+→ π+νν̄ . NaNet is the reconfigurable design of a FPGA-based PCI Express Network Interface Card with processing, RDMA and GPUDirect capabilities, supporting multiple link technologies. NaNet has been employed to implement a real-time distributed processing pipeline in the the low level trigger of the experiment, operating on the data streams produced by the RICH detector with an orchestrated combination of heterogeneous computing devices (CPUs, FPGAs and GPUs). Recent results collected during NA62 runs are presented and discussed.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123436381","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades RD53A: HL-LHC硅像素探测器二期升级的大型样机
E. Monteil, M. Barbero, D. Fougeron, S. Godiot, M. Menouni, P. Pangaud, A. Rozanov, P. Breugnon, M. Bomben, G. Calderini, F. Crescioli, G. Marchiori, D. Dzahini, F. Rarbi, R. Gaglione, H. Krueger, T. Hemperek, F. Huegging, P. Rymazewski, M. Vogt, T. Wang, N. Wermes, M. Karagounis, C. Marzocca, F. Loddo, F. Licciulli, A. Andreazza, V. Liberali, A. Stabile, L. Frontini, M. Bagatin, D. Bisello, S. Gerardin, S. Mattiazzo, A. Paccagnella, D. Vogrig, S. Bonaldo, N. Bacchetta, L. Gaioni, M. Manghisoni, V. Re, E. Riceputi, G. Traversi, L. Ratti, C. Vacchi, K. Androsov, R. Beccherle, G. Magazzú, M. Minuti, F. Morsani, F. Palla, S. Poulios, G. Bilei, M. Menichelli, P. Placidi, S. Marconi, G. Dellacasa, N. Demaria, G. Mazza, E. Monteil, L. Pacher, A. Rivetti, A. Paternò, D. Gajanna, V. Gromov, R. Kluit, A. Vitkovskiy, T. Benka, M. Havranek, Z. Janoška, M. Marcisovsky, G. Neue, L. Tomasek, V. Kafka, V. Vrba, E. López-Morillo, F. R. Palomo, F. Muñoz, I. Vila, E. Jiménez, D. Abbaneo, J. Christiansen, S. Orfanelli, S. B
{"title":"RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades","authors":"E. Monteil, M. Barbero, D. Fougeron, S. Godiot, M. Menouni, P. Pangaud, A. Rozanov, P. Breugnon, M. Bomben, G. Calderini, F. Crescioli, G. Marchiori, D. Dzahini, F. Rarbi, R. Gaglione, H. Krueger, T. Hemperek, F. Huegging, P. Rymazewski, M. Vogt, T. Wang, N. Wermes, M. Karagounis, C. Marzocca, F. Loddo, F. Licciulli, A. Andreazza, V. Liberali, A. Stabile, L. Frontini, M. Bagatin, D. Bisello, S. Gerardin, S. Mattiazzo, A. Paccagnella, D. Vogrig, S. Bonaldo, N. Bacchetta, L. Gaioni, M. Manghisoni, V. Re, E. Riceputi, G. Traversi, L. Ratti, C. Vacchi, K. Androsov, R. Beccherle, G. Magazzú, M. Minuti, F. Morsani, F. Palla, S. Poulios, G. Bilei, M. Menichelli, P. Placidi, S. Marconi, G. Dellacasa, N. Demaria, G. Mazza, E. Monteil, L. Pacher, A. Rivetti, A. Paternò, D. Gajanna, V. Gromov, R. Kluit, A. Vitkovskiy, T. Benka, M. Havranek, Z. Janoška, M. Marcisovsky, G. Neue, L. Tomasek, V. Kafka, V. Vrba, E. López-Morillo, F. R. Palomo, F. Muñoz, I. Vila, E. Jiménez, D. Abbaneo, J. Christiansen, S. Orfanelli, S. B","doi":"10.22323/1.343.0157","DOIUrl":"https://doi.org/10.22323/1.343.0157","url":null,"abstract":"The Phase 2 upgrades of silicon pixel detectors at HL-LHC experiments feature extreme require- ments, such as: 50x50 μm pixels, high rate (3 GHz/cm2), unprecedented radiation levels (1 Grad), high readout speed and serial powering. As a consequence a new readout chip is required. In this framework the RD53 collaboration submitted RD53A, a large scale chip demonstrator de- signed in 65 nm CMOS technology, integrating a matrix of 400×192 pixels. It features design variations in the analog and digital pixel matrix for testing purposes. An overview of the building blocks will be given together with test results on single chips.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132761144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The End-of-Substructure (EoS) card for the Strip Tracker Upgrade of the ATLAS experiment ATLAS实验中条带跟踪器升级的末端子结构(EoS)卡
C. Wanotayaroj, H. Ceslik, Helmut Colbow, S. Díez, P. Goettlicher, A. Melnik, M. Stanitzki, Jonas Wolff
{"title":"The End-of-Substructure (EoS) card for the Strip Tracker Upgrade of the ATLAS experiment","authors":"C. Wanotayaroj, H. Ceslik, Helmut Colbow, S. Díez, P. Goettlicher, A. Melnik, M. Stanitzki, Jonas Wolff","doi":"10.22323/1.343.0130","DOIUrl":"https://doi.org/10.22323/1.343.0130","url":null,"abstract":"For the ATLAS experiment a new Silicon tracker is necessary for the High-Luminosity Upgrade of the LHC. The main building block for the strip tracker is a module which consists of a silicon sensor, readout ASICs and a hybrid PCB. Up to 28 modules are placed on long substructures. An End-of-Substructure (EoS) card provides common connections for data, commands and power to the off-detector systems. Prototypes has been developed based on the GBTx and GBT-SCA chip family and SFP+ optical links to understand the design issues, the behavior of the EoS and the detector level integration. Presented will be the design of the electronics, the exercised tests for electrical behavior, mechanical deformation and thermal behavior.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"146 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116462065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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