2016 IEEE International Conference on Rebooting Computing (ICRC)最新文献_第3页

Neural processor design enabled by memristor technology 忆阻器技术使神经处理器设计成为可能

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738693

Chenchen Liu, Yiran Chen, Hai Helen Li

引用次数: 5

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738701

Fred Rothganger, C. James, J. Aimone

引用次数: 4

FinSAL: A novel FinFET based Secure Adiabatic Logic for energy-efficient and DPA resistant IoT devices FinSAL:一种新型的基于FinFET的安全绝热逻辑，用于节能和抗DPA的物联网设备

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738710

S. D. Kumar, H. Thapliyal, Azhar Mohammad

{"title":"FinSAL: A novel FinFET based Secure Adiabatic Logic for energy-efficient and DPA resistant IoT devices","authors":"S. D. Kumar, H. Thapliyal, Azhar Mohammad","doi":"10.1109/ICRC.2016.7738710","DOIUrl":"https://doi.org/10.1109/ICRC.2016.7738710","url":null,"abstract":"With the emergence of Internet of Things (IoT), there is an urgent need to design energy-efficient and secure IoT devices. For example, IoT devices such as Radio Frequency Identification (RFID) tags and Wireless Sensor Nodes (WSN) employ AES cryptographic modules that are susceptible to Differential Power Analysis (DPA) attacks. With the scaling of technology, leakage power in the cryptographic devices increases, which increases the vulnerability to DPA attacks. This paper presents a novel FinFET based Secure Adiabatic Logic (FinSAL), that is energy-efficient and DPA-immune. The proposed adiabatic FinSAL is used to design logic gates such as buffers, XOR, and NAND. Further, the logic gates based on adiabatic FinSAL are used to implement a Positive Polarity Reed Midler (PPRM) architecture based S-box circuit. SPICE simulations at 12.5 MHz show that adiabatic FinSAL S-box circuit saves up to 84% of energy per cycle as compared to the conventional S-box circuit implemented using FinFET. Further, the security of adiabatic FinSAL S-box circuit has been evaluated by performing the DPA attack through SPICE simulations. We proved that the FinSAL S-box circuit is resistant to a DPA attack through a developed DPA attack flow applicable to SPICE simulations.","PeriodicalId":387008,"journal":{"name":"2016 IEEE International Conference on Rebooting Computing (ICRC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127788055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Optically-inspired computing based on spin waves 基于自旋波的光学启发计算

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738707

Á. Papp, G. Csaba, W. Porod

引用次数: 4

Molecular cellular networks: A non von Neumann architecture for molecular electronics 分子细胞网络:分子电子学的非冯·诺依曼结构

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738699

C. Lent, K. Henderson, S. Kandel, S. Corcelli, G. Snider, A. Orlov, P. Kogge, M. Niemier, Ryan C. Brown, J. Christie, Natalie A. Wasio, Rebecca C. Quardokus, R. P. Forrest, Jacob P. Peterson, Angela Silski, David A. Turner, E. Blair, Yuhui Lu

引用次数: 23

Information processing with large-scale optical integrated circuits 大规模光学集成电路的信息处理

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738704

D. Kielpinski, R. Bose, J. Pelc, T. Vaerenbergh, G. Mendoza, N. Tezak, R. Beausoleil

{"title":"Information processing with large-scale optical integrated circuits","authors":"D. Kielpinski, R. Bose, J. Pelc, T. Vaerenbergh, G. Mendoza, N. Tezak, R. Beausoleil","doi":"10.1109/ICRC.2016.7738704","DOIUrl":"https://doi.org/10.1109/ICRC.2016.7738704","url":null,"abstract":"Photonic integrated circuits (PICs) offer an enticing platform for further advances in computation. Photonic communications hardware is already widely used within datacenters and is now reaching into the board and chip level. This trend is driving the development of more complex PICs that are more tightly integrated into computing systems. This PIC technology could be attractive for building photonic computational accelerators and for incorporating all-optical signal processing tasks into photonic communications and sensing. At Hewlett Packard Labs, we are using a silicon photonics platform to build complex PICs with many hundreds of components, including nonlinear components. We use these PICs to test various approaches to photonic computation, including neuromorphic approaches as well as traditional logic circuits. For example, we are currently fabricating a circuit to solve the so-called Ising problem, a classic problem of solid-state physics that turns out to be equivalent to a number of combinatorial optimization problems. The circuit is closely related to Hopfield neural networks. In parallel, we are investigating PICs based on photonic crystals in an InGaAs platform. These PICs offer radically reduced power consumption compared to CMOS circuits, potentially consuming less than 1 fJ per elementary operation.","PeriodicalId":387008,"journal":{"name":"2016 IEEE International Conference on Rebooting Computing (ICRC)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125135606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

Double barrier memristive devices for neuromorphic computing 用于神经形态计算的双屏障记忆装置

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738713

Mirko Hansen, M. Ziegler, H. Kohlstedt

{"title":"Double barrier memristive devices for neuromorphic computing","authors":"Mirko Hansen, M. Ziegler, H. Kohlstedt","doi":"10.1109/ICRC.2016.7738713","DOIUrl":"https://doi.org/10.1109/ICRC.2016.7738713","url":null,"abstract":"The intensified development of memristive devices for memory applications in recent years lead to the advancement of several other possible fields of operation. Among them, the use of memristive devices for neuromorphic computing is one of the most promising applications. Here, we present an especially for neuromorphic computing attractive quantum mechanical memristive device which offers the benefits of an intrinsic current compliance, a gradual resistance change, and no need for an initial electric forming procedure. Our findings indicate that a homogenous interfacial effect is responsible for the observed memristive I-V curves rather than locally confined filaments. The layer sequence of the investigated device is Nb/Al/Al2O3/NbxOy/Au. The layer thickness of the Al2O3 tunnel barrier and the adjacent NbxOy solid state electrolyte layer are 1.3 nm and 2.5 nm, respectively. Thus it is possible to mutually affect the probability of electron tunneling through Al2O3 and the height of the Schottky NbxOy/Au barrier by oxygen migration (drift-diffusion). For this purpose the important issues of the respective energy barriers and ultra-thin memristive layers are investigated. Experimental findings are supported by an equivalent circuit model which furthermore provides a better understanding of the underlying physical mechanisms and allows the identification of essential fabrication parameters. Electrical characteristics are investigated and discussed in the framework of their capability to emulate synaptic functionality. Finally, the pros and cons of the double-barrier devices are discussed with respect to their possible applications in novel neuromorphic circuits.","PeriodicalId":387008,"journal":{"name":"2016 IEEE International Conference on Rebooting Computing (ICRC)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122578148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

XtokaxtikoX: A stochastic computing-based autonomous cyber-physical system XtokaxtikoX:一个基于随机计算的自主网络物理系统

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738716

R. Duarte, H. Neto, M. Véstias

引用次数: 3

Overcoming the Static Learning Bottleneck - the need for adaptive neural learning 克服静态学习瓶颈——对自适应神经学习的需求

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738692

C. Vineyard, Stephen J Verzi

引用次数: 1

High density multilayer optical circuit board for unprecedented connectivity at board scales 高密度多层光学电路板，实现前所未有的板级连接

2016 IEEE International Conference on Rebooting Computing (ICRC) Pub Date : 2016-10-01 DOI: 10.1109/ICRC.2016.7738709

Andrew Michaels, E. Yablonovitch

引用次数: 0