D. Kielpinski, R. Bose, J. Pelc, T. Vaerenbergh, G. Mendoza, N. Tezak, R. Beausoleil
{"title":"Information processing with large-scale optical integrated circuits","authors":"D. Kielpinski, R. Bose, J. Pelc, T. Vaerenbergh, G. Mendoza, N. Tezak, R. Beausoleil","doi":"10.1109/ICRC.2016.7738704","DOIUrl":null,"url":null,"abstract":"Photonic integrated circuits (PICs) offer an enticing platform for further advances in computation. Photonic communications hardware is already widely used within datacenters and is now reaching into the board and chip level. This trend is driving the development of more complex PICs that are more tightly integrated into computing systems. This PIC technology could be attractive for building photonic computational accelerators and for incorporating all-optical signal processing tasks into photonic communications and sensing. At Hewlett Packard Labs, we are using a silicon photonics platform to build complex PICs with many hundreds of components, including nonlinear components. We use these PICs to test various approaches to photonic computation, including neuromorphic approaches as well as traditional logic circuits. For example, we are currently fabricating a circuit to solve the so-called Ising problem, a classic problem of solid-state physics that turns out to be equivalent to a number of combinatorial optimization problems. The circuit is closely related to Hopfield neural networks. In parallel, we are investigating PICs based on photonic crystals in an InGaAs platform. These PICs offer radically reduced power consumption compared to CMOS circuits, potentially consuming less than 1 fJ per elementary operation.","PeriodicalId":387008,"journal":{"name":"2016 IEEE International Conference on Rebooting Computing (ICRC)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Conference on Rebooting Computing (ICRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICRC.2016.7738704","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
Photonic integrated circuits (PICs) offer an enticing platform for further advances in computation. Photonic communications hardware is already widely used within datacenters and is now reaching into the board and chip level. This trend is driving the development of more complex PICs that are more tightly integrated into computing systems. This PIC technology could be attractive for building photonic computational accelerators and for incorporating all-optical signal processing tasks into photonic communications and sensing. At Hewlett Packard Labs, we are using a silicon photonics platform to build complex PICs with many hundreds of components, including nonlinear components. We use these PICs to test various approaches to photonic computation, including neuromorphic approaches as well as traditional logic circuits. For example, we are currently fabricating a circuit to solve the so-called Ising problem, a classic problem of solid-state physics that turns out to be equivalent to a number of combinatorial optimization problems. The circuit is closely related to Hopfield neural networks. In parallel, we are investigating PICs based on photonic crystals in an InGaAs platform. These PICs offer radically reduced power consumption compared to CMOS circuits, potentially consuming less than 1 fJ per elementary operation.