S. Bhattacharya, Y. W. Kim, P. Chahal, M. Allen, R. Tummala, R. Hubbard
{"title":"MCM-L Compatible Integrated Resistors And Capacitors","authors":"S. Bhattacharya, Y. W. Kim, P. Chahal, M. Allen, R. Tummala, R. Hubbard","doi":"10.1109/ISAPM.1998.664473","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664473","url":null,"abstract":"Integration of passive components offers inherent benefits such as reduced size, density, cost, and improved packaging efficiency and reliability. An integrated RC network requiring relatively large capacitance and resistance was selected as a model for integration of R and C components using low temperalare PWB compatible fabrication processes. Ohmega-Ply resistor/conductor laminates and photodefinable epoxies filled with high K ceramic powders were used as candidate materials for fabrication of embedded resistors and thin film capacitors. In order to reduce in-plane device area, multilayer (currently, two-layer) capacitors were stacked in the thickness direction. Meniscus coating of filled polymer dielectrics over large area (12 in x 12 in) was evaluated for cost and manufacturability advantages. This paper discusses the design, choice of materials, and fabricatilon issues of an integrated RC device. 1. Introlduction The Packaging Research Center at Georgia Tech is in the process of developing low temperalure MCM-L based processes suitable ICR L","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"222 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122046695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Godan Ma, Q. Tong, A. Savoca, M. Bonneau, T. Debarros
{"title":"Novel fast cure and reworkable underfill materials","authors":"Godan Ma, Q. Tong, A. Savoca, M. Bonneau, T. Debarros","doi":"10.1109/ISAPM.1998.664424","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664424","url":null,"abstract":"A novel fast flow, fast cure and reworkable underfill material has been developed. This non-epoxy material satisfies all the basic requirements for underfill materials, such as high glass transition temperature, low viscosity and low thermal expansion coefficient. During laboratory testing, this underfill exhibits excellent flow behavior (about 10 seconds for a quarter inch die), and fast curability (less than 5 minutes at 150/spl deg/C). A distinct feature of this underfill material is its reworkability. The rework was achieved by thermal removal of the silicon die, followed by solvent cleaning of the underfill. Laboratory work demonstrates that the chip removal and underfill cleanup process can be completed within 5 minutes.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122023098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Sequential modeling of via geometry in photosensitive MCM dielectric materials using neural networks","authors":"Tae Seon Kim, G. May","doi":"10.1109/ISAPM.1998.664441","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664441","url":null,"abstract":"Via formation using photosensitive polymer technology reduces process cost and is hence of great interest in electronics packaging substrate fabrication. However, to overcome process complexity issues and to facilitate low-cost manufacturing, process optimization and control are required. In this paper, a modeling approach for via formation in MCM dielectric layers composed of photosensitive benzocyclobutene (BCB) is presented. A series of designed experiments are used to characterize the via formation work-cell (which consists of the spin coat, soft bake, expose, develop, cure, and plasma de-scum unit process steps). Sequential neural network process models are then constructed to characterize entire via formation process. In the sequential scheme, each work-cell sub-process is modeled individually, and each sub-process model is linked to previous sub-process outputs and subsequent sub-process inputs. This modeling scheme is compared with two other modeling approaches to evaluate model prediction capability. The sequential method shows superior prediction capability. This modeling structure will be useful for feedback and feed-forward process control, and it will eventually be used for development of supervisory process control scheme.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121922160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Mechanical testing of thin polymer films","authors":"C. Feger","doi":"10.1109/ISAPM.1998.664438","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664438","url":null,"abstract":"Package designers need reliable mechanical data of packaging materials at a variety of temperatures in order to predict stress distribution and to make long term predictions on package reliability. It is generally assumed that coefficients of thermal expansion and modulus data of metals and ceramics do not depend on the film thickness of these materials. The same, however, does not hold true for polymers. This poses several questions: How strong is the dependence of thermo-mechanical properties on film thickness? How well can these properties be measured? Do all polymers behave similarly? This paper explores some of these issues.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124033811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Packaging induced stresses in a packaged micromechanical microphone","authors":"O. Rusanen, A. Torkkeli, J. Vahakangas","doi":"10.1109/ISAPM.1998.664454","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664454","url":null,"abstract":"The emergence of micromechanical components and systems offers a viable step towards miniaturisation of electronics products. VTT Electronics has developed a capacitive microphone that is manufactured using silicon micromachining. Die bonding to silicon substrate has shown to inflict only minor stresses to the microphone performance when an elastic silicone adhesive is used. Flip chip bonding will increase the amount of stresses, especially if the substrate material is not matched to silicon in its thermal expansion.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124868567","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An investigation into the fracture of silicon die used in flip chip applications","authors":"S. Popelar","doi":"10.1109/ISAPM.1998.664431","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664431","url":null,"abstract":"In this investigation, the fracture strength of silicon has been measured as a function of die thickness, crystal orientation and die surface treatment using a four-point bend test method. The influence of minute surface flaws or divots generated from a die singulation process has also been quantified. The amount of silicon surface damage sustained in typical IC post-fabrication processes is then estimated using a simplified fracture mechanics approach. Results show that fracture strength does not depend on crystal orientation or thickness, but that it is highly dependent on the amount of surface damage present. In addition to the fracture strength measurements, finite element models have been employed to predict the amount of stress generated in a flip chip die for a given design. A parametric study has been performed to look at the influence of die thickness, substrate thickness and underfill properties (elastic modulus and coefficient of thermal expansion) on maximum die stress. Results show that the level of stress in die assembled to organic substrates is much greater than in die assembled to ceramic substrates. Stress levels determined from the finite element models are then compared to the silicon fracture strength for a given backside treatment in order to predict the likelihood of fracture.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127027575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Evaluation of a thermally enhanced mold compound, containing SCAN/sup TM/ silica coated aluminum nitride filler, for SO-8 packaged power MOSFETs","authors":"K. Edwards, K. Howard","doi":"10.1109/ISAPM.1998.664462","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664462","url":null,"abstract":"The performance of a new thermally conductive mold compound containing SCAN/sup TM/ Silica Coated Aluminum Nitride filler has been investigated for use with power MOSFET devices in the SO-8 package. Thermal performance was determined through measurement of junction-to-ambient thermal resistance (R/spl theta/ja), both in still air and in a wind tunnel environment. Additionally, the devices were evaluated for shifts in electrical characteristics and extensive reliability testing was performed. It was found that the SCAN filler material reduced the R/spl theta/ja by 8 to 13% (compared to the standard angular silica filler material) while causing no shifts in electrical characteristics and no degradation in device reliability. It was concluded that the while our version of the SO-8 package (with fused leadframe) would not realize the maximum potential benefit from a thermally enhanced mold compound, the mold compound containing SCAN filler would provide a measurable increase in thermal performance which allows for an increased current rating of the device and lower typical junction temperatures.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130705828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. M. Mobley, T.E. Derflinger, R. Parker, J. D. Myers
{"title":"Characterization and reliability of conductive ink/polymer filled microvias","authors":"W. M. Mobley, T.E. Derflinger, R. Parker, J. D. Myers","doi":"10.1109/ISAPM.1998.664442","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664442","url":null,"abstract":"The robustness and reliability of conductive polymer materials for multilayer laminate substrate interconnection has evolved from electronic packaging applications in rather benign environments to applications that endure the harshest automotive environments, i.e. underhood and on-engine. This extended abstract serves as an introductory survey of conductive ink/polymer filled microvia materials, process, and reliability development. It characterizes in microstructural detail several conductive ink systems used to fill microvias, describes multilayer laminate substrate fabrication and interconnection approaches along with some related process issues. It highlights the design advantages of these constructions and summarizes results of bare board reliability testing and the requirements for demanding automotive environments. The bulk resistivity of these conductive ink materials range from 35 to 300 (/spl mu//spl Omega/ cm) depending on the degree of contiguity of the metal phases. The adhesion and/or metallurgical bonding to opposing layer-to-layer circuit pads is critical in obtaining suitable reliability and low contact resistance of the interconnection. The utilization of these interconnection methods for mixed density substrate applications as well as multilayer laminate substrate approaches will be briefly discussed.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115296282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Schubert, R. Dudek, D. Vogel, B. Michel, H. Reichl, H. Jiang
{"title":"Thermo-mechanical reliability of flip chip structures used in DCA and CSP","authors":"A. Schubert, R. Dudek, D. Vogel, B. Michel, H. Reichl, H. Jiang","doi":"10.1109/ISAPM.1998.664453","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664453","url":null,"abstract":"The continuing demand towards high-density and low profile integrated circuit packaging has accelerated the development of flip chip structures as used in direct chip attach (DCA) technology and chip size packages (CSP). The advantages in density, cost and electrical performance are obvious. Solder joints, the most widely used flip chip interconnects, have a relatively low structural compliance due to the large thermal expansion mismatch between silicon die and the organic substrate. This causes high thermally induced creep strain on the interconnects during temperature cycling and leads to early failure of the solder connections. The reliability of flip chip structures can be enhanced by applying an epoxy-based underfill between the chip and the substrate, encapsulating the solder joints. However, over ranges of design, process, and material parameters, different failure modes are observed with significant dependence on material properties and geometry. Nonlinear finite element analysis for flip chip structures is carried out to investigate the reliability impact due to a number of selected design and material parameters. Especially two fundamental issues are addressed, namely, the optimization of thermomechanical properties of underfill materials and manufacturing process-induced defects.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121788347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Aschenbrenner, R. Miessner, K. Becker, I. Reichl
{"title":"Characterization of adhesive materials for high circuit density applications","authors":"R. Aschenbrenner, R. Miessner, K. Becker, I. Reichl","doi":"10.1109/ISAPM.1998.664465","DOIUrl":"https://doi.org/10.1109/ISAPM.1998.664465","url":null,"abstract":"This report presents the results of the evaluation of isotropic and anisotropic conductive adhesives for flip chip and chip size package applications. Samples consist of bumped testchips mounted on fine pitch rigid and flexible substrates. The finest pitch of the rigid glass substrates is 70 /spl mu/m and for the flexible substrates 100 /spl mu/m. Promising candidate for adhesive joining technique are the isotropic conductive adhesives. These adhesives are isotropic, which means that they conduct electricity equally in all directions. To use such adhesives in flip chip applications, the material has to be applied precisely onto the points to be connected, and is not allowed to flow and short circuit between circuit lines. The anisotropicaliy conductive adhesive materials are prepared by dispersing electrically conductive particles in an adhesive matrix at a concentration that is high enough to assure reliable conductivity between the substrate and the IC electrodes. The reliability evaluation was performed with special regard to the degradation and to the interface reactions between polymers and metal surfaces in adhesive contacts. The electrical and mechanical performance of the adhesive bonds were studied by evaluating initial contact resistance and mechanical adhesion as a function of temperature and humidity. A detailed thermo-mechanical analysis was used to determine the optimal cure schedule and to characterize the materials according to their physical properties. This kind of analysis method has also been used to optimize the curing profile, i.e. to shorten the curing time.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133314720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}