1994 Proceedings. 44th Electronic Components and Technology Conference最新文献_第5页

Moisture ingress into nonhermetic enclosures and packages. A quasi-steady state model for diffusion and attenuation of ambient humidity variations 湿气进入非密封外壳和包装。环境湿度变化扩散和衰减的准稳态模型

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367630

M. Tencer

{"title":"Moisture ingress into nonhermetic enclosures and packages. A quasi-steady state model for diffusion and attenuation of ambient humidity variations","authors":"M. Tencer","doi":"10.1109/ECTC.1994.367630","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367630","url":null,"abstract":"In this paper the rate of moisture ingress into enclosures was studied theoretically and experimentally. A simple quasi-steady state (QSS) model was developed enabling one to calculate easily time constants for moisture diffusion through plastic walls, rubber gaskets and openings. The characteristic time constant is /spl tau/=VL/AP+L/sup 2//2D where P is permeability, D diffusion constant, V volume of the enclosure, L wall thickness and A surface area. The model clarifies the relative importance of moisture permeability vs. diffusion constant of wall materials and is applicable to both large enclosures and microelectronic packages. For thin and/or nonabsorbing walls the first term (a function of P) predominates while with thick and/or absorbing walls the second term (which depends on D) prevails. For openings, /spl tau/=VL/AD, it was shown that the QSS model is practically equivalent to but simpler than full transient solutions of the Fick's second law. The attenuation of variations of atmospheric humidity by packaging was also modeled with the QSS model. The inside air humidity changes with the same frequency as the ambient but its amplitude is attenuated by a factor f=cos /spl phi/=1/(1+/spl omega//sup 2//spl tau//sup 2/)/sup 1/2/ and is phase shifted by an angle /spl phi/=arccos [1/(1+/spl omega//sup 2//spl tau//sup 2/)/sup 1/2/] where /spl omega/ is the angular frequency of humidity changes. Therefore the protective value of packaging will be different in different geographical areas.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123001227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 66

Development of a high performance TQFP package 高性能TQFP封装的开发

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367651

P. Hoffman, D. Liang, D. Mahulikar, A. Parthasarathi

引用次数: 6

The effect of the cross-section of outlead on lead skew 引线截面对引线偏斜的影响

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367544

T. Momose, H. Yagi, S. Kawano, T. Ikenaga, Y. Nishikubo

引用次数: 0

Concurrent packaging architecture design 并行封装架构设计

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367648

L. Cao, J. Krusius

引用次数: 10

Solder joint reliability of surface mount chip resistors/capacitors on insulated metal substrates 绝缘金属基板上表面贴装片式电阻/电容的焊点可靠性

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367551

J. Suhling, R.W. Johnson, J. White, K.W. Matthai, R. Knight, C. S. Romanczuk, S.W. Burcham

{"title":"Solder joint reliability of surface mount chip resistors/capacitors on insulated metal substrates","authors":"J. Suhling, R.W. Johnson, J. White, K.W. Matthai, R. Knight, C. S. Romanczuk, S.W. Burcham","doi":"10.1109/ECTC.1994.367551","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367551","url":null,"abstract":"For enhanced heat transfer, insulated metal substrates are attractive alternatives to the FR-4 printed circuit boards which have been conventionally used in automotive engine controllers. Although appealing from the viewpoint of enhanced thermal performance, the high coefficient of thermal expansion of aluminum relative that of FR-4 boards leads to a increased probability of fatigue failures of surface mount solder connections subjected to thermal cycling. In this work, the thermal fatigue life and reliability of solder joints used to attach components to insulated metal substrates has been studied using finite element modeling and actual life testing. In particular, this investigation has examined the reliability of solder connections for ceramic chip resistors and chip capacitors. Several two-dimensional (plane stress and plane strain) and three-dimensional nonlinear finite element models have been prepared and executed for both chip resistors and chip capacitors on insulated metal substrates. Several common sizes of the resistors/capacitors have been modeled including 1206, 0805, 0603, and 0402. Attributes of the finite element models included elastic-plastic solder constitutive behavior, large deformations, and thermal cycling. Initiation of solder joint fatigue cracking was estimated using the predicted plastic strains within a Coffin-Manson type fatigue model. The fatigue life predictions of the finite element analyses have been correlated with solder joint crack initiation and life measurements for actual components under thermal cycling. A broad matrix of test configurations with various substrate materials, resistor/capacitor sizes, and encapsulants has been considered.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121188887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Epoxy encapsulation on Ceramic Quad Flat Packs 环氧树脂封装陶瓷四平面包装

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367617

T. Carden, J. Clementi, S. Engle

{"title":"Epoxy encapsulation on Ceramic Quad Flat Packs","authors":"T. Carden, J. Clementi, S. Engle","doi":"10.1109/ECTC.1994.367617","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367617","url":null,"abstract":"The Ceramic Quad Flat Pack (CQFP) is a high performance, low cost technology for surface mount applications. It is an extension of the Metallized Ceramic (MC) and Metallized Ceramic with Polyimide (MCP) product base. These finished modules conform to JEDEC I/O and footprint standards. The packages are available in 0.5 mm and 0.4 mm lead pitches with flexibility to address unique application requirements such as body sizes or lead counts/pitches. Semiconductor die interconnection is performed using either flip chip (C4-Controlled Collapse Chip Connection) attach or wirebonding. Excellent package reliability with no intrinsic wear out failure mechanism results by encapsulating solder joints from the silicon C4 die and peripheral lead to ceramic carrier. IBM evaluated several encapsulant configurations, and tested over 2000 encapsulated carriers and 897000 individual solder joints during development and qualification. Epoxy encapsulation of solder joint connections on CQFP's has been successfully implemented in production across several IBM manufacturing sites. This enhancement eliminates any intrinsic failure mechanism associated with fatigue wear out. It is a significant extension of a low cost and high reliability product technology.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127064636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Radio-frequency connector and interconnect reliability in spaceborne applications 星载应用中的射频连接器和互连可靠性

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367576

E. Nhan, P.M. Lafferty, R. Stilwell, K. Chao

引用次数: 1

Rationalization of gold ball bond shear strengths 金球粘结剂抗剪强度的合理化

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367588

R. Pantaleón, J. Sánchez-Mendoza, M. Mena

引用次数: 6

A [100] silicon stress test chip with optimized piezoresistive sensor rosettes [100]硅应力测试芯片与优化压阻传感器玫瑰花

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367587

R. Jaeger, J. Suhling, A. Anderson

{"title":"A [100] silicon stress test chip with optimized piezoresistive sensor rosettes","authors":"R. Jaeger, J. Suhling, A. Anderson","doi":"10.1109/ECTC.1994.367587","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367587","url":null,"abstract":"A new piezoresistive stress sensing test chip for use on (100) silicon wafers is discussed. The die design contains four-element dual-polarity rosettes optimized for use in measurement of the in-plane normal stress difference (/spl sigma//sub 11//sup '/-/spl sigma//sub 22//sup '/) and the in-plane shear stress /spl sigma//sub 12//sup '/. The rosettes offer high sensitivity to stress since their outputs are proportional to the largest piezoresistive coefficients, /spl pi//sub 44/ in p-type silicon and /spl pi//sub D/ in the n-type silicon. The rosette outputs are both temperature compensated and insensitive to rotational alignment errors and are independent of the out-of-plane normal stress /spl sigma//sub 33/'. Thus, they may be used to measure the in-plane stress components in plastic encapsulated packages where /spl sigma//sub 33/' is not zero. Three-element off-axis p-type and n-type rosettes are also included on each chip for use in uniaxial calibration of the required piezoresistive coefficients. The properties of these rosettes are reviewed, and it is shown that the off-axis rosette yields temperature compensated calibration of the values of /spl pi//sub 44/ and /spl pi//sub D/.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121459407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 33

Manufacturing stresses in die due to die attach process 由于模具附着过程造成的模具制造应力

1994 Proceedings. 44th Electronic Components and Technology Conference Pub Date : 1994-05-01 DOI: 10.1109/ECTC.1994.367623

P. Tsao, Arkady S. Voloshin

{"title":"Manufacturing stresses in die due to die attach process","authors":"P. Tsao, Arkady S. Voloshin","doi":"10.1109/ECTC.1994.367623","DOIUrl":"https://doi.org/10.1109/ECTC.1994.367623","url":null,"abstract":"Manufacturing of the electronic packages consisting of different materials leads to the development of the residual stresses due to mismatch in the coefficients of thermal expansion. Thus, to properly assess service life of the packages, those stresses must be taken into account. An experimental technique, the digital image analysis enhanced moire interferometry ( DIAEMI), was used to measure the in-situ out-of-plane displacements of the die due to the die-attach process. This information was related to the residual stresses in the die. Several test dies, with and without coating, were prepared and two different bonding materials, \"low-stress\" and \"high-stress\", were used for analysis of the induced stresses. The initial and final (after die-attach) surface contour patterns of the dies were observed and recorded. Out-of-plane displacements of the dies were obtained and induced stresses were calculated by a hybrid finite element method. The results show that stresses in die induced by high-stress bonding material are on average five times higher than the stresses induced by low-stress material. It was also found that during die-attach some of residual stresses induced by chip's coating were released. The obtained results were compared with the straight forward finite element method prediction. It shows that the stresses predicted by the straight forward finite element analysis are much higher than the stresses obtained by the hybrid method.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121569197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6