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A 0.037mm2 1GSps 12b self-calibrated 40nm CMOS DAC cell with SFDR>60dB up to 200MHz and IM3 < —60dB up to 350MHz 一个0.037mm2 1GSps 12b自校准的40nm CMOS DAC单元，SFDR bb0 60dB高达200MHz, IM3 < -60dB高达350MHz
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218326
G. Radulov, P. Quinn
{"title":"A 0.037mm2 1GSps 12b self-calibrated 40nm CMOS DAC cell with SFDR>60dB up to 200MHz and IM3 < —60dB up to 350MHz","authors":"G. Radulov, P. Quinn","doi":"10.1109/ECCTD49232.2020.9218326","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218326","url":null,"abstract":"This paper presents a very small area 12b IGSps self-calibrated current-steering DAC cell occupying just 0.037mm2 in 40nm, while delivering SFDR>60dB up to 200MHz and IM3<-60dB up to 350MHz. The DAC architecture, selfcalibration apparatus and layout are specifically designed as a balance between small area, robustness, and high performance, so that embedding in VLSI is feasible. The small size of the DAC unit allows massive integration, which is demonstrated in this work by an array of 16 12b DAC units.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128662317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Design Considerations of Antennas and Adaptive Impedance Matching Networks for RF Energy Harvesting 射频能量收集天线和自适应阻抗匹配网络的设计考虑
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218310
D. Lauder, Yichuang Sun
{"title":"Design Considerations of Antennas and Adaptive Impedance Matching Networks for RF Energy Harvesting","authors":"D. Lauder, Yichuang Sun","doi":"10.1109/ECCTD49232.2020.9218310","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218310","url":null,"abstract":"This paper reviews recent developments in design of antennas and impedance matching networks for RF Energy Harvesting (RF-EH) at UHF. The antenna design is considered in conjunction with the requirements that it places on the impedance matching network (IMN), in order to match the load which is an RF to DC converter. It is shown that there may be advantages in using an interface impedance between the antenna and the IMN that differs from the conventional 50 Ω impedance. Various options are considered for the design of an IMN driving a rectifier load. A novel adaptive IMN architecture is proposed that can match two different load impedances, depending on the received power level. This can optimize Power Conversion Efficiency (PCE) over a range of different input powers that may be encountered in RF EH.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117187653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Breaking the Conversion Wall in Mixed-Signal Systems Using Neuromorphic Data Converters 利用神经形态数据转换器打破混合信号系统的转换壁垒
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218340
Loai Danial, Shahar Kvatinsky
{"title":"Breaking the Conversion Wall in Mixed-Signal Systems Using Neuromorphic Data Converters","authors":"Loai Danial, Shahar Kvatinsky","doi":"10.1109/ECCTD49232.2020.9218340","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218340","url":null,"abstract":"Data converters are ubiquitous in mixed-signal systems, becoming the computational bottleneck in traditional data acquisition and emerging neuromorphic systems. Unfortunately, conventional Nyquist data converters trade off speed, power, and accuracy. Therefore, they are exhaustively customized for special purpose applications. Furthermore, intrinsic real-time and post-silicon variations dramatically degrade their performance along with the CMOS technology downscaling. Here, we review on our neuromorphic analog-to-digital (ADC) and digital-to-analog (DAC) converters that are trained using the online stochastic gradient descent algorithm to autonomously adapt to different design specifications, including multiple full-scale voltages, number of resolution bits, and sampling frequencies. We demonstrate the feasibility of our converters by simulations and preliminary experiments using memristive technologies. We show collective properties of our converters in application reconfiguration, logarithmic quantization, mismatches calibration, noise tolerance, and power optimization. The proposed data converters achieve a superior figure-of-merit (FoM) of 1 fJ/conv.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131039382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Microfluidic sensors based on memristive circuits synchronization 基于忆阻电路同步的微流控传感器
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218414
M. Bucolo, A. Buscarino, L. Fortuna, S. Gagliano, Giovanna Stella
{"title":"Microfluidic sensors based on memristive circuits synchronization","authors":"M. Bucolo, A. Buscarino, L. Fortuna, S. Gagliano, Giovanna Stella","doi":"10.1109/ECCTD49232.2020.9218414","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218414","url":null,"abstract":"In the recent years, two-phase microfluidics has contributed to various scientific areas such as chemistry, biology and medicine. In particular, two-phase flows, obtained from two immiscible fluids or a mix of fluid and microparticles, gained attention for their possible application in implementing logic gates and programmable devices. Moreover, their behavior in networks of microchannels is still not well studied, even if some experimental results are presented in literature but far from well-established framework that can drive to the flow control. Recently, the dynamics of two-phase microfluidic setups has been characterized by means of chaos synchronization obtaining a behavioral model of the bubble flow. Starting from these results, in this contribution the possibility to model the bubble flow behavior in a two-phase microfluidic with a simple nonlinear two-element circuit composed by a capacitor and a memristive device. The circuit is able to synchronize its dynamics to the microfluidic setup behavior, therefore acting as a qualitative sensor of the hydrodynamic regime.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"128 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133904972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Globally-optimized Co-design Approach for Heterogeneous Systems Using Convex Optimization 基于凸优化的异构系统全局优化协同设计方法
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218373
T. Horst, R. Fischbach, J. Lienig
{"title":"A Globally-optimized Co-design Approach for Heterogeneous Systems Using Convex Optimization","authors":"T. Horst, R. Fischbach, J. Lienig","doi":"10.1109/ECCTD49232.2020.9218373","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218373","url":null,"abstract":"Manufacturing methods for heterogeneous systems allow for high-density integration of multiple semiconductor devices in one system or package. Current design tools and approaches do not incorporate the intensified heterogeneity of 3D systems sufficiently. They provide suboptimal design solutions because the overall global solutions cannot be optimized. In this paper, we present a co-design methodology to globally solve and optimize the design problem and so to fully exploit the potential of emerging technologies. We use a design example to show the advantage and potential of a co-design methodology compared to conventional top-down approaches. Our approach should guide further research and tool development in this emerging field of heterogeneous system design.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132697914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A New Approach to the Design of CMOS Inductorless Common-gate Low-noise Amplifiers CMOS无电感共门低噪声放大器设计的新方法
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218334
Antonio D. Martínez-Pérez, P. Martínez, G. Royo, F. Aznar, S. Celma
{"title":"A New Approach to the Design of CMOS Inductorless Common-gate Low-noise Amplifiers","authors":"Antonio D. Martínez-Pérez, P. Martínez, G. Royo, F. Aznar, S. Celma","doi":"10.1109/ECCTD49232.2020.9218334","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218334","url":null,"abstract":"This work proposes a new approach to design a simple and effective LNA reaching very competitive results in 1.2V 65-nm standard CMOS technology. The proposed design uses a transconductance enhancement technique to achieve 2.3 dB of noise figure at the 5 GHz band. The paper exposes the advantages of a reduced number of devices in the circuit and analyses the topology. Simulations with complete technology models and statistical analysis are presented for more precise results.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132085751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Neuromorphic circuits on segmented crossbar architectures with enhanced properties 具有增强特性的分段横杆结构上的神经形态电路
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218289
V. Ntinas, P. Karakolis, G. Sirakoulis, P. Dimitrakis
{"title":"Neuromorphic circuits on segmented crossbar architectures with enhanced properties","authors":"V. Ntinas, P. Karakolis, G. Sirakoulis, P. Dimitrakis","doi":"10.1109/ECCTD49232.2020.9218289","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218289","url":null,"abstract":"General purpose processors have been used in a wide variety of computational and modeling applications. However, their performance is not always sufficient when simulating neural networks, which are widely applied to signal processing and pattern recognition. In this work, after a systematic study of the computational requirements of such neural networks and an exploration of the available hardware solutions through which the aforementioned applications can be accelerated, a modern neuromorphic circuit structure is proposed with its operation attributed to memristor devices and segmented crossbar architecture. By coupling these two technologies, neuromorphic circuits have been designed with high computational performance versus integration scale and power consumption. An Ex-Situ training paradigm based on the advantageous memristor segmented crossbar is proposed, using the MNIST dataset and resulting at 97% accuracy. At the same time, a novel memristor tuning method on 1D1M configuration has been developed, able to increase the memristor programming speed.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115098331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
The Big Picture of Delay-PUF Dependability 延迟- puf可靠性的全貌
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218396
Alexander Schaub, J. Danger, O. Rioul, S. Guilley
{"title":"The Big Picture of Delay-PUF Dependability","authors":"Alexander Schaub, J. Danger, O. Rioul, S. Guilley","doi":"10.1109/ECCTD49232.2020.9218396","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218396","url":null,"abstract":"Physically Unclonable Functions (PUFs) allow to generate bitstrings for applications such as device identification, authentication, or key management. For real-world deployment, the industry has stringent requirements on reliability. In addition, as it greatly impacts the security of the whole application chain, the randomness produced by the PUF cannot be compromised. These two requirements are captured by the notions of dynamic randomness—to be minimized in order to improve reliability— and static randomness—to be maximized to increase security.In this paper, we illustrate the whole methodology on a delay-PUF called the loop-PUF. To meet the above requirements on dynamic and static randomness, the PUF’s behavior should be modeled and validated; such activities are described in the international standard ISO/IEC 20897. Modeling consists in establishing a stochastic model of the PUF, to predict bit error rates due to dynamic noise, and entropies of the static noise. The model is then verified, its parameters estimated, based on measures in representative environmental conditions.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131813808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A New CNN Occlusion Masking Method for IRT Imaging in Neurosurgery 神经外科IRT成像中一种新的CNN遮挡方法
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218388
Yahya Moshaei-Nezhad, Juliane Müller, C. Schnabel, M. Kirsch, R. Tetzlaff
{"title":"A New CNN Occlusion Masking Method for IRT Imaging in Neurosurgery","authors":"Yahya Moshaei-Nezhad, Juliane Müller, C. Schnabel, M. Kirsch, R. Tetzlaff","doi":"10.1109/ECCTD49232.2020.9218388","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218388","url":null,"abstract":"In this paper, a new occlusion masking method based on Cellular Nonlinear Networks (CNN) for a 2-dimensional (2D) InfraRed Thermography (IRT) brain image is proposed. IRT imaging is one of the noteworthy technique in the medical analysis due to capturing those activities which cannot be seen with unarmed eyes. In neurosurgery, the image occlusion can be classified roughly into two fashions namely, surgery tools and reflection of surgery tools (or cover by the ice-cold saline solution) over the brain cortex surface. In the proposed method, firstly, a CNN texture segmentation is carried out to separate the image textures by the local ratio of the black and white pixels. Thereafter, a CNN dilation is employed to increase the black and white pixels separation. Next, a CNN remove-small-object and filling-holes are exerted for revamping the texture segmentation. Afterwards, the obtained mask is applied to remove the occluded area in the image. To overcome the issues related to reconstruction after masking the image, a solution is given by a 5×5 overlapping sliding window with respect to a reference image, in order to substitute the masked area (pixel values) in the target image. Our proposed method is evaluated on real IRT brain cortex images and compared with other methods. The proposed method shows promising results for IRT brain images in comparison to those other mentioned methods.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132207126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Dynamics of a New Hysteresis Memristor CNN 一种新型迟滞记忆电阻器CNN的动力学研究
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218329
A. Slavova
{"title":"Dynamics of a New Hysteresis Memristor CNN","authors":"A. Slavova","doi":"10.1109/ECCTD49232.2020.9218329","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218329","url":null,"abstract":"In this paper we study a new class of hysteresis memristor CNN (HM-CNN). The model under investigations contains a simpler state equation with hysteresis operator in the feedback circuit and resonant tunnel diode in the output. The dynamics is studied in different regions depending on hysteresis nonlinearity. The proposed HM-CNN exhibits various complex phenomena in hysteresis region by exploiting its local activity and edge of chaos. Some applications of HM-CNN model in nanostructures are provided.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"28 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123595519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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